Panasonic GM1 - Page 521

Processing when capture trigger input occurs frequently
(Note 1)
(Note 2)
(Note 3)
(Note 1)
The capture enable request bit is turned ON by a user program.
(Note 2) Each time a capture flag turns ON, a capture operation is performed asynchronously with user
program execution. The capture completion internal flag used by the system is reset each time an I/O
refresh is performed.
(Note 3) Capture * status bits are reflected each time an I/O refresh is performed. If multiple capture operations
are performed continuously, the capture 0 completion status bit or capture 1 completion status bit will
remain ON.
● If control signals used as capture triggers are input frequently, the capture 0 completion status
bit or capture 1 completion status bit will remain ON. T
ake care when reading multiple captured
data items.
12.6 High-speed Counter Function
WUME-GM1RTXOP-01 12-59