YASKAWA VIPA SPEED7 - UDT 3 - ACLREC - Data Structure for FB 48

Parameter Declaration Data type Description
ACLBlock INPUT BLOCK
Data block with the access codes. Ä Chap. 7.3.3
‘UDT 4 - ACL - Data structure for FB 48’ page 109
Access1 OUTPUT BOOL Output 1, can be controlled as pulse or static.
Access2 OUTPUT BOOL Output 2, can be controlled as pulse or static.
Access3 OUTPUT BOOL Output 3, can be controlled as pulse or static.
Access4 OUTPUT BOOL Output 4, can be controlled as pulse or static.
Access5 OUTPUT BOOL Output 5, can be controlled as pulse or static.
Access6 OUTPUT BOOL Output 6, can be controlled as pulse or static.
Error OUTPUT BOOL If the access code does not exist in the data
block, the output Error is set for the duration Time-
Error.
CentralLocked OUTPUT BOOL
n Access
– TRUE: locked - access not possible
– FALSE: not locked - access possible
Default: TRUE
TimePulse CONSTANT Time Time for the pulse duration at an output.
Default: 3s
TimeError CONSTANT Time Time for the duration of the error signal.
Default: 500ms
7.3.2 UDT 3 - ACLREC - Data structure for FB 48
Address Name Type Start value Comment
0.0 STRUCT
+0.0 Code STRING[16] ' ' Byte 0 ... 17: Access code
S7String with max. 16 ASCII characters for
access code
+18.0 EnableOutput1 BOOL FALSE Byte 18: Signal for the outputs to be controlled
TRUE: activate output,
FALSE: deactivate output
+18.1 EnableOutput2 BOOL FALSE
+18.2 EnableOutput3 BOOL FALSE
+18.3 EnableOutput4 BOOL FALSE
+18.4 EnableOutput5 BOOL FALSE
+18.5 EnableOutput6 BOOL FALSE
+18.6 EnableRes7 BOOL FALSE
+18.7 EnableRes8 BOOL FALSE
Description
VIPA SPEED7
Building Control
Access Control > UDT 3 - ACLREC - Data structure for FB 48
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