Example:
......
A I5.4
L MW20
S T30
// Siemens S7-300 only proofs if timer
// is actively executed
// SPEED7, Siemens S7-400 and CPU 318
// always proof (also when no condition is present)
......
3.5 Registers
The ACCUs are registers for the processing of byte, words or double words. Therefore
the operands are loaded in the ACCUs and combined. The result of the instruction is
always in ACCU1.
ACCU Bit
ACCUx (x=1 ... 4)
ACCUx-L
ACCUx-H
ACCUx-LL
ACCUx-LH
ACCUx-HL
ACCUx-HH
Bit 0 ... bit 31
Bit 0 ... bit 15
Bit 16 ... bit 31
Bit 0 ... bit 7
Bit 8 ... bit 15
Bit 16 ... bit 23
Bit 24 ... bit 31
The address registers contain the area-internal or area-crossing addresses for the reg-
ister-indirect addressed instructions. The address registers are 32bit wide.
The area-internal or area-crossing addresses have the following structure:
area-internal address:
00000000 00000bbb bbbbbbbb bbbbbxxx
area-crossing address:
10000yyy 00000bbb bbbbbbbb bbbbbxxx
Legend: b Byte address
x Bit number
Y Range ID
Ä
Chap. 3.6 ‘Addressing examples’ page 28
The values are analysed or set by the instructions. The status word is 16bit wide.
ACCU1 ... ACCU4 (32bit)
Address register AR1 and
AR2 (32bit)
Status word (16bit)
VIPA SPEED7
IL operations
Registers
HB00 | OPL_SP7 | Operation list | en | 18-30 27
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