YASKAWA VIPA SPEED7 - Combination Instructions (Bit)

3.18 Combination instructions (Bit)
Examining the signal state of the addressed instruction and gating the result with the RLO
according to the appropriate logic function.
Com-
mand
Operand Parameter Function Length
in words
A AND operation at signal state "1"
I/Q a.b 0.0 ... 2047.7 Input/output 1/2
M a.b 0.0 ... 8191.7 Bit memory 1/2
L a.b parameterizable Local data bit 2
DBX a.b 0.0 ... 65535.7 Data bit 2
DIX a.b 0.0 ... 65535.7 Instance data bit 2
c [AR1,m] register-indirect, area-internal (AR1) 2
c [AR2,m] register-indirect, area-internal (AR2) 2
[AR1,m] area-crossing (AR1) 2
[AR2,m] area-crossing (AR2) 2
Parameter via parameters 2
AN AND operation of signal state "0"
I/Q a.b 0.0 ... 2047.7 Input/output 1/2
M a.b 0.0 ... 8191.7 Bit memory 1/2
L a.b parameterizable Local data bit 2
DBX a.b 0.0 ... 65535.7 Data bit 2
DIX a.b 0.0 ... 65535.7 Instance data bit 2
c [AR1,m] register-indirect, area-internal (AR1) 2
c [AR2,m] register-indirect, area-internal (AR2) 2
[AR1,m] area-crossing (AR1) 2
[AR2,m] area-crossing (AR2) 2
Parameter via parameters 2
Status word for: A, AN BR CC1 CC0 OV OS OR STA RLO /FC
Instruction depends on - - - - -
ü
-
ü ü
Instruction influences - - - - -
ü ü ü
1
Com-
mand
Operand Parameter Function Length
in words
O OR operation at signal state "1"
I/Q a.b 0.0 ... 2047.7 Input/output 1/2
M a.b 0.0 ... 8191.7 Bit memory 1/2
Combination instructions
with bit operands
VIPA SPEED7
IL operations
Combination instructions (Bit)
HB00 | OPL_SP7 | Operation list | en | 18-30 55