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ABOV Semiconductor Co., Ltd.
P9DB (P9 Debounce Enable Register): CFH
Initial value: 00H
Configure Debounce of P94 Port
Configure Debounce of P93Port
Configure Debounce of P92 Port
Configure Debounce of P91 Port
Configure Debounce of P90 Port
NOTE)
1. If the same level is not detected on enabled pin three or four times in a row at the sampling
clock, the signal is eliminated as noise.
2. A pulse level should be input for the duration of 3 clocks or more to be actually detected as a
valid edge.
3. The port debounce is automatically disabled at stop mode and recovered after stop mode
release.
4. Refer to the port 1 debounce enable register (P1DB) for the debounce clock of port 9.