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Abov MC97F60128 - Page 136

Abov MC97F60128
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136
MC97F60128
EIFLAG1 (External Interrupt Flag 1 Register): BBH
7
6
5
4
3
2
1
0
T7IFR
T6IFR
T5IFR
T4IFR
T3IFR
FLAG18
FLAG9
FLAG8
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial value: 00H
T7IFR
When T7 interrupt occurs, this bit becomes 1. The flag is cleared only by writing a 0
to the bit. So, the flag should be cleared by software. Writing 1 has no effect.
0
T7 Interrupt no generation
1
T7 Interrupt generation
T6IFR
When T6 interrupt occurs, this bit becomes 1. The flag is cleared only by writing a 0
to the bit. So, the flag should be cleared by software. Writing 1 has no effect.
0
T6 Interrupt no generation
1
T6 Interrupt generation
T5IFR
When T5 interrupt occurs, this bit becomes 1. The flag is cleared only by writing a 0
to the bit. So, the flag should be cleared by software. Writing 1 has no effect.
0
T5 Interrupt no generation
1
T5 Interrupt generation
T4IFR
When T4 interrupt occurs, this bit becomes 1. The flag is cleared only by writing a 0
to the bit. So, the flag should be cleared by software. Writing 1 has no effect.
0
T4 Interrupt no generation
1
T4 Interrupt generation
T3IFR
When T3 interrupt occurs, this bit becomes 1. The flag is cleared only by writing a 0
to the bit. So, the flag should be cleared by software. Writing 1 has no effect.
0
T3 Interrupt no generation
1
T3 Interrupt generation
EIFLAG1[2:0]
When an External Interrupt 8/9/18(EINT8, EINT9, EINT18) is occurred, the flag
becomes ‘1’. The flag is cleared by writing a 0 to the bit. So, the flag should be
cleared by software. Writing 1 has no effect.
0
External Interrupt 8/9/18 not occurred
1
External Interrupt 8/9/18 occurred
EIPOL1 (External Interrupt Polarity 1 Register): BFH
7
6
5
4
3
2
1
0
POL18
POL9
POL8
R/W
R/W
R/W
R/W
R/W
R/W
Initial value: 00H
EIPOL1[5:0]
External interrupt (EINT8,EINT9,EINT18) polarity selection
POLn[1:0]
Description
0
0
No interrupt at any edge
0
1
Interrupt on rising edge
1
0
Interrupt on falling edge
1
1
Interrupt on both of rising and falling edge
Where n =8, 9 and 18

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