Abov MC97F60128 - Page 204

204
MC97F60128
ABOV Semiconductor Co., Ltd.
T8PCR3 (Timer 8 PWM Control Register 3) : 4095H (XSFR)
7
6
5
4
3
2
1
0
HZCLR
POLBO
POLAA
POLAB
POLBA
POLBB
POLCA
POLCB
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial value : 00H
HZCLR
High-Impedance Output Clear Bit
0
No effect
1
Clear high-impedance output
(The PWM8xA/PWM8xB pins are back to output and this bit is automatically
cleared to logic ‘0’. where x = A, B and C)
POLBO
Configure PWM8AB/PWM8BB/PWM8CB Channel Polarity When these pins are
disabled
0
These pins are output according to the polarity setting when disable
(POLAB/POLBB/POLCB bits)
1
These pins are same level as the PWM8xA pins regardless of the polarity
setting when disable (POLAB/POLBB/POLCB bits, where x = A, B and C)
POLAA
Configure PWM8AA Channel Polarity
0
Start at high level (This pin is low level when disable)
1
Start at low level (This pin is high level when disable)
POLAB
Configure PWM8AB Channel Polarity
0
Non-inversion signal of PWM8AA pin
1
Inversion signal of PWM8AA pin
POLBA
Configure PWM8AA Channel Polarity
0
Start at high level (This pin is low level when disable)
1
Start at low level (This pin is high level when disable)
POLBB
Configure PWM8BB Channel Polarity
0
Non-inversion signal of PWM8BA pin
1
Inversion signal of PWM8BA pin
POLCA
Configure PWM8CA Channel Polarity
0
Start at high level (This pin is low level when disable)
1
Start at low level (This pin is high level when disable)
POLCB
Configure PWM8CB Channel Polarity
0
Non-inversion signal of PWM8CA pin
1
Inversion signal of PWM8CA pin