Abov MC97F60128 User Manual

380
MC97F60128
ABOV Semiconductor Co., Ltd.
11.12.16 Asynchronous Data Reception ............................................................................................................ 243
11.12.17 Register Map ........................................................................................................................................ 245
11.12.18 UART Register Description .................................................................................................................. 245
11.12.19 Register Description for UART2/3/4 .................................................................................................... 245
11.12.20 Baud Rate setting (example) ............................................................................................................... 250
11.13 USI0/1 (UART + SPI + I2C) ........................................................................................................................ 251
11.13.1 Overview .............................................................................................................................................. 251
11.13.2 USI0/1 UART Mode ............................................................................................................................. 252
11.13.3 USI0/1 UART Block Diagram ............................................................................................................... 253
11.13.4 USI0/1 Clock Generation ..................................................................................................................... 254
11.13.5 USI0/1 External Clock (SCKn) ............................................................................................................. 255
11.13.6 USI0/1 Synchronous mode operation .................................................................................................. 255
11.13.7 USI0/1 UART Data format ................................................................................................................... 256
11.13.8 USI0/1 UART Parity bit ........................................................................................................................ 257
11.13.9 USI0/1 UART Transmitter .................................................................................................................... 257
11.13.10 USI0/1 UART Sending Tx data ............................................................................................................ 257
11.13.11 USI0/1 UART Transmitter flag and interrupt ........................................................................................ 257
11.13.12 USI0/1 UART Parity Generator ............................................................................................................ 258
11.13.13 UART Disabling Transmitter ................................................................................................................ 258
11.13.14 USI0/1 UART Receiver ........................................................................................................................ 258
11.13.15 USI0/1 UART Receiving Rx data ......................................................................................................... 258
11.13.16 USI0/1 UART Receiver Flag and Interrupt .......................................................................................... 259
11.13.17 USI0/1 UART Parity Checker ............................................................................................................... 259
11.13.18 USI0/1 UART Disabling Receiver ........................................................................................................ 259
11.13.19 USI0/1 Asynchronous Data Reception ................................................................................................ 260
11.13.20 USI0/1 SPI Mode ................................................................................................................................. 262
11.13.21 USI0/1 SPI Clock Formats and Timing ................................................................................................ 262
11.13.22 USI0/1 SPI Block Diagram ................................................................................................................... 265
11.13.23 USI0/1 I2C Mode ................................................................................................................................. 266
11.13.24 USI0/1 I2C Bit Transfer ........................................................................................................................ 266
11.13.25 USI0/1 I2C Start / Repeated Start / Stop ............................................................................................. 267
11.13.26 USI0/1 I2C Data Transfer .................................................................................................................... 267
11.13.27 USI0/1 I2C Acknowledge ..................................................................................................................... 268
11.13.28 USI0/1 I2C Synchronization / Arbitration ............................................................................................. 268
11.13.29 USI0/1 I2C Operation .......................................................................................................................... 269
11.13.30 USI0/1 I2C Master Transmitter ............................................................................................................ 270
11.13.31 USI0/1 I2C Master Receiver ................................................................................................................ 272
11.13.32 USI0/1 I2C Slave Transmitter .............................................................................................................. 274
11.13.33 USI0/1 I2C Slave Receiver .................................................................................................................. 275
11.13.34 USI0/1 I2C Block Diagram ................................................................................................................... 276
11.13.35 Register Map ........................................................................................................................................ 277
11.13.36 Register Description............................................................................................................................. 277
11.13.37 Register Description for USI0/1 ........................................................................................................... 277
11.13.38 Baud Rate setting (example) ............................................................................................................... 286
11.14 12-Bit A/D Converter ................................................................................................................................... 287
11.14.1 Overview .............................................................................................................................................. 287
11.14.2 Conversion Timing ............................................................................................................................... 287
11.14.3 Block Diagram ...................................................................................................................................... 288
11.14.4 ADC Operation ..................................................................................................................................... 289
11.14.5 Register Map ........................................................................................................................................ 290
11.14.6 ADC Register Description .................................................................................................................... 290
11.14.7 Register Description for ADC ............................................................................................................... 291
11.15 12-Bit D/A Converter ................................................................................................................................... 294
11.15.1 Overview .............................................................................................................................................. 294
11.15.2 Function Description ............................................................................................................................ 294
11.15.3 D/A Converter Data and Buffer Registers ............................................................................................ 294
11.15.4 Automatically D/AC Data Increment/Decrement ................................................................................. 295
11.15.5 Programmable Gain Controller ............................................................................................................ 296
11.15.6 12-Bit External D/AC Interface ............................................................................................................. 297
11.15.7 Block Diagram ...................................................................................................................................... 298
11.15.8 Register Map ........................................................................................................................................ 299

Abov MC97F60128 Specifications

General

Brand	Abov
Model	MC97F60128
Category	Microcontrollers
Language	English