Abov MC97F60128 - Page 72

72
MC97F60128
ABOV Semiconductor Co., Ltd.
DPL (Data Pointer Register Low) : 82H
7
6
5
4
3
2
1
0
DPL
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial value : 00H
DPL
Data Pointer Low
DPH (Data Pointer Register High) : 83H
7
6
5
4
3
2
1
0
DPH
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial value : 00H
DPH
Data Pointer High
DPL1 (Data Pointer Register Low 1) : 84H
7
6
5
4
3
2
1
0
DPL1
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial value : 00H
DPH1 (Data Pointer Register High 1) : 85H
7
6
5
4
3
2
1
0
DPH1
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial value : 00H
DPH1
Data Pointer High 1
PSW (Program Status Word Register) : D0H
7
6
5
4
3
2
1
0
CY
AC
F0
RS1
RS0
OV
F1
P
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial value : 00H
CY
Carry Flag
AC
Auxiliary Carry Flag
F0
General Purpose User-Definable Flag
RS1
Register Bank Select bit 1
RS0
Register Bank Select bit 0
OV
Overflow Flag
F1
User-Definable Flag
P
Parity Flag. Set/Cleared by hardware each instruction cycle to indicate an
odd/even number of ‘1’ bits in the accumulator
DPL1
Data Pointer Low 1