48
8331B–AVR–03/12
Atmel AVR XMEGA AU
• Bit 3:0 – REVID[3:0]: Revision ID
These bits contains the device revision. 0 = A, 1= B and so on.
4.20.5 JTAGUID – JTAG User ID register
• Bit 7:0 – JTAGUID[7:0]: JTAG User ID
The JTAGUID can be used to identify two devices with identical device ID in a JTAG scan chain.
The JTAGUID will automatically be loaded from flash and placed in these registers.
4.20.6 MCUCR – Control register
• Bit 7:1 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always
write these bits to zero when this register is written.
• Bit 0 – JTAGD: JTAG Disable
Setting this bit will disable the JTAG interface. This bit is protected by the configuration change
protection mechanism. For details refer to ”Configuration Change Protection” on page 13.
4.20.7 ANAINIT – Analog Initialization register
• Bit 7:4 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always
write these bits to zero when this register is written.
• Bit 3:2 / 1:0 – STARTUPDLYx
Setting these bits enables sequential start of internal components used for the ADC, DAC, and
analog comparator with main input/output connected to that port. When this is done, the internal
components such as voltage reference and bias currents are started sequentially when the mod-
Bit 76543210
+0x04 JTAGUID[7:0] JTAGUID
Read/Write RRRRRRRR
Initial Value 1/0 1/0 1/0 1/0 1/0 1/0 1/0 1/0
Bit 76543210
+0x06 – – – – – – – JTAGD MCUCR
Read/Write RRRRRRRR/W
Initial Value 0 0 0 0 0 0 0 0
Bit 76543210
+0x07 – – – – STARTUPDLYB[1:0] STARTUPDLYA[1:0] ANAINIT
Read/Write R R R R R/W R/W R/W R/W
Initial Value 0 0 0 0 0 0 0 0
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