0006-Front Panel 0128-DIMM0A 0136-DIMM0B
0144-DIMM0C 0160-DIMM1A 0168-DIMM1
0176-DIMM1C 0184-DIMM1D 0000-Motherboard
If you do not see all of the above CRU IDs, concentrate on the missing CRU IDs. You should
eventually end up with the following Alert (IPMI) event for this action as read from the SEL:
If you do show the Alert level 5 “Missing CRU device - CPU 0 PIROM”, continue to the next
step.
Log Entry 3: Dec 2005 21:50:43
Alert Level 5: Critical
Keyword: Type-02 257100 2453760
Missing FRU device - CPU 0 PIROM
Logged by: Baseboard Management Controller,
Sensor: Entity Presence
0x2041CB3DB3020040 FF20807115250300
6. Insert the CPU board CRU with at least module 0 processor installed. When you add the CPU
board CRU and turn on system power, the cooling fans should turn on and stay on and the
DF command output should look something like the following:
CRU IDs
-------
0001-Mem Extender 0002-Power Converter 0003-Power Supply 0
0004-Power Supply 1 0005-Diagnostic Panel 0006 Front Panel
0007-Disk Management 0008-Disk backplane 0010-Processor Board
0012-Power Pod 0 0013-Power Pod 1 0032-CPU 0 PIROM
0033-CPU 1 PIROM 0036-Processor 0 RAM 0037-Processor 1 RAM
0128-DIMM0A 0136-DIMM0B 0144-DIMM0C
0152-DIMM0D 0160-DIMM1A 0168-DIMM1B
0176-DIMM1C 0184-DIMM1D 0000-Motherboard
At this point, if the installed CRUs are all functional, the system should initiate POST on all
processors. It is recommended to observe the system console output using “Live Logs” to ensure
that POST is initiated and completes without error.
If POST does not start after a few seconds, suspect some sort of CPU board or processor
problem. Typical problems will show up in the SEL or FWP. If the IMPI event logs do not point
to a root cause, escalate to bring in expert assistance.
CPU/Memory/SBA
All of the CPU, Memory controller, and System Bus Adapter (SBA or I/O rope controller) functions
reside on the Processor card CRU; memory DIMMs reside on memory extender CRUs; and the
Local Bus Adapter (LBAs or PCI-X bus controller chips) reside on the common I/O Backplane FRU
along with core and customer Host Bus Adapter (HBA device controller) I/O cards. This section
discusses the roles of logical CPUs, physical memory ranks, and the rope interfaces in the SBA
logic of the zx2 chip.
CPU/Memory/SBA 155
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