R
6 Intel
®
82925X/82925XE MCH Datasheet
8.1.24
PM_CS1—Power Management Control/Status (D1:F0) ....................129
8.1.25
SS_CAPID—Subsystem ID and Vendor ID Capabilities (D1:F0) ......130
8.1.26
SS—Subsystem ID and Subsystem Vendor ID (D1:F0) ....................130
8.1.27
MSI_CAPID—Message Signaled Interrupts Capability ID (D1:F0)....131
8.1.28
MC—Message Control (D1:F0)..........................................................132
8.1.29
MA—Message Address (D1:F0).........................................................133
8.1.30
MD—Message Data (D1:F0) ..............................................................133
8.1.31
PEG_CAPL—PCI Express* Capability List (D1:F0)...........................134
8.1.32
PEG_CAP—PCI Express*-G Capabilities (D1:F0).............................134
8.1.33
DCAP—Device Capabilities (D1:F0) ..................................................135
8.1.34
DCTL—Device Control (D1:F0)..........................................................136
8.1.35
DSTS—Device Status (D1:F0) ...........................................................137
8.1.36
LCAP—Link Capabilities (D1:F0) .......................................................138
8.1.37
LCTL—Link Control (D1:F0)...............................................................139
8.1.38
LSTS—Link Status (D1:F0) ................................................................140
8.1.39
SLOTCAP—Slot Capabilities (D1:F0) ................................................141
8.1.40
SLOTCTL—Slot Control (D1:F0)........................................................142
8.1.41
SLOTSTS—Slot Status (D1:F0) .........................................................143
8.1.42
RCTL—Root Control (D1:F0) .............................................................144
8.1.43
RSTS—Root Status (D1:F0)...............................................................145
8.1.44
PEGLC—PCI Express*-G Legacy Control .........................................146
8.1.45
VCECH—Virtual Channel Enhanced Capability Header (D1:F0) ......147
8.1.46
PVCCAP1—Port VC Capability Register 1 (D1:F0) ...........................147
8.1.47
PVCCAP2—Port VC Capability Register 2 (D1:F0) ...........................148
8.1.48
PVCCTL—Port VC Control (D1:F0) ...................................................148
8.1.49
VC0RCAP—VC0 Resource Capability (D1:F0) .................................149
8.1.50
VC0RCTL—VC0 Resource Control (D1:F0) ......................................149
8.1.51
VC0RSTS—VC0 Resource Status (D1:F0)........................................150
8.1.52
VC1RCAP—VC1 Resource Capability (D1:F0) .................................150
8.1.53
VC1RCTL—VC1 Resource Control (D1:F0) ......................................151
8.1.54
VC1RSTS—VC1 Resource Status (D1:F0)........................................152
8.1.55
RCLDECH—Root Complex Link Declaration Enhanced Capability
Header (D1:F0)...................................................................................152
8.1.56
ESD—Element Self Description (D1:F0)............................................153
8.1.57
LE1D—Link Entry 1 Description (D1:F0)............................................154
8.1.58
LE1A—Link Entry 1 Address (D1:F0).................................................155
8.1.59
PEGSSTS—PCI Express*-G Sequence Status (D1:F0)....................155
9
System Address Map......................................................................................................157
9.1
Legacy Address Range......................................................................................158
9.1.1
DOS Range (0h – 9_FFFFh) ..............................................................159
9.1.2
Legacy Video Area (A_0000h–B_FFFFh) ..........................................159
9.1.3
Expansion Area (C_0000h–D_FFFFh)...............................................160
9.1.4
Extended System BIOS Area (E_0000h–E_FFFFh)..........................161
9.1.5
System BIOS Area (F_0000h–F_FFFFh)...........................................161
9.1.6
Programmable Attribute Map (PAM) Memory Area Details................161
9.2
Main Memory Address Range (1 MB to TOLUD) ..............................................162
9.2.1
ISA Hole (15 MB–16 MB) ...................................................................162
9.2.2
TSEG ..................................................................................................163
9.2.3
Pre-allocated Memory.........................................................................163
9.3
PCI Memory Address Range (TOLUD – 4 GB) .................................................163
9.3.1
APIC Configuration Space (FEC0_0000h–FECF_FFFFh).................164
9.3.2
HSEG (FEDA_0000h–FEDB_FFFFh)................................................165
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