i~.
HARDWARE DESCRIPTION OFTHE 8051,8052 AND 80C51
Read-Modify-WriteFeature
Someinstructions that read a port read the latch and
othersread the pin.Whichonesdowhich?The instruc-
tionsthat readthe latchrather thanthe pin are the ones
that read a value possiblychangeit, and then rewriteit
to the latch. Theseare called “read-modify-write”in-
structions.The instructionslistedbeloware read-mod-
ify-writeinstructions.Whenthe destinationoperandis
a wrt, or a PII bit, these instructionsread the latch
rather than the pin:
ANL
(logicalAND, e.g.,ANL PI, A)
ORL (logicalOR, e.g.,ORL P2, A)
XRL
(logicalEXIOR,e.g.,XRL P3, A)
JBC (jump if bit = 1 and clear bit, e.g.,
JBC P1.1,LABEL)
CPL (complementbit, e.g.,CPL P3.0)
INC (increment,e.g.,INC P2)
DEC
(decrement,e.g.,DEC P2)
DJNZ (decrernent andjump if not zero, e.g.,
DJNZ P3, LABEL)
MOV,PX.Y,C (movecarry bit to bit Y of Port X)
CLRPX.Y
(clearbit Y of Port X)
SETBPX.Y (setbit Y of Port X)
It is not obviousthat the fast three instructions in this
list are read-modify-writeinstructions, but they are.
Theyread the portbyt%all 8bits,modifythe addressed
bit, then write the newbytebackto the latch.
The reason that read-modify-writeinstructions are di-
rected to the latch rather than the pin is to avoid a
possiblemisinterpretation of the voltage level at the
pin. For example,a port bit mightbe usedto drivethe
baseof a transistor. Whena 1is written to the bit, the
transistoris turned on. If the CPUthen readsthe same
port bit at the pin rather than the latch, it will read the
base voltage of the transistor and interpret it as a O.
Readingthe latch rather than the pin will return the
correct vafueof 1.
ACCESSING EXTERNAL MEMORY
Accesses
to externalmemoryare oftwo types:accewes
to external Program Memoryand amesaes
to external
Data Memory.Accessesto externalprogram Memory
use signal PSEN (program store enable) as the read
strobe.Accessesto externalData Memoryuse ~ or
~ (alternate functionsofP3.7andP3.6)to strobethe
memory.Referto Figures36through38in the Internal
Tintingsection.
Fetchesfrom externrdProgram Memoryalways use a
16bit address. Accesses
to externalData Memorycan
use either a l~bit address (MOVX @DPTR) or an
8-bitaddress (MOVX@w).
Whenevera id-bit addressis used,the highbyte of the
address comes out on Port 2, where it is held for the
durationofthe reador writecycle.Notethat the Port 2
drivers use the strong pullups during the entire time
that they are emittingaddressbits that are 1s.This is
duringthe executionof a MOVX@DPTRinstruction.
Duringthis time the Port 2latch (the SpecialFunction
Register)doesnot haveto contain 1s,and the contents
of the Port 2 SFR are not modified,If the external
memorycycle is not immediatelyfoflowedby another
externalmemorycycle,the undisturbedcontentsofthe
Port 2 SFR will reappearin the nextcycle.
If an 8-bit address is being used (MOVX @Ri), the
contentsof the Port 2 SFR remain at the Port 2 pins
throughoutthe externafmemorycycle.Thiswillfacili-
tate paging.
In any case, the lowbyte of the addressis time-muki-
plexed with the data byte on Port O.The ADDR/
DATA signal drivesboth FETs in the Port Ooutput
buffers.Thus,in thisapplicationthe Port Opinsme not
open-drainoutputs, and do not require external pull-
ups. Signal ALE (Address Latch Enable) shoufd be
usedto capture the addressbyteinto an externallatch.
The address byte is validat the negativetransition of
ALE.Then, in a writecycle,the data byteto bewritten
appearson
PortOjustbrrm ~ is activated,and re-
mains there until after WR is deactivated.In a read
cycle,the in
comingbyte is acceptedat Port Ojust be-
forethe read strobeis deactivated.
Duringany accessto externalmemory,the CPU writes
OFFHto the Port Olatch (the SpecialFunctionRegis-
ter), thus obliteratingwhateverinformationthe Port O
SFRmayhavebeenholding.Ifthe userwriteato PortO
during an external memoryfetch, the incomingcode
byte is corrupted. Therefore,do not write to Port Oif
externalprogrammemoryis used.
ExternalProgram Memoryis
amessedunder two con-
ditions:
1) Wheneversignal= is active;or
2) Whenever the program counter (PC) contains a
numberthat is largerthan OFFFH(WFFH for the
8052).
Thisrequiresthat the ROMleasversionshave~ wired
lowto enablethelower4K(8Kforthe8032)program
bytesto be fetchedfrom extemafmemory.
When the CPU is executingout of external Program
Memory,all 8bits of Port 2 are dedicatedto an output
fimctionand maynotbe usedfor generalpurposeI/O.
Duringexternal programfetchesthey output the high
byteof the PC. Duringthis timethe Port 2 driversuse
the strong pullupsto emit PC bits that are 1s.
TIMER/COUNTERS
The8051has two 16-bitTimer/Counterregisters:Tim-
er Oand Timer 1. The 8052has these two plus one
3-9
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