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8XC51FX HARDWARE DESCRIPTION
1.0 INTRODUCTION
The 8XC51FX is a highly integrated 8-bit rnicroeon-
trollerbasedon the MCS-51 architecture.As a member
of the MCS-51 family, the 8XC51FX is optimized
for
control applications. Its key feature is the programma-
ble counterarray(PCA) which is capableof measuring
and generatingpulse informationon five 1/0 pina.Also
included are an enhanced serial port for muM-proces-
sor communications,an up/down timer/counter, and a
programlock scheme for the on-chip programmemory.
Since the 8XC51FX products are CHMOS, they have
two software selectable reduced power modes: Idle
Mode and Power Down Mode.
The 8XC51FX usea the standard 8051 instruction set
and is pin-for-pincompatible with the existing MCS-51
family of products.
This domrnent presents a comprehensivedescription of
the on-chip hardwarefeaturesof the 8XC51FX. It be-
gins with a discussion of the on-chip memory and then
discuaseaeach of the peripheralslisted below.
Please note that 8XC51FX does not include the
80C51FA and 83C51FA. l%ereforq these devices do
not have some of the featuresfound on the 8XC51FX.
These featuresare:progmmma
ble clock out, four level
interrupt priority structure, enhanced program lock
scheme and asynchronous port reset.
● Four 8-Bit Bidirectional Parallel Ports
● Three 16-Bit Timer/Counters with
— One Up/Down Timer/Counter
— Clock Out
● pro~ble COunterArrsYwith
— Compare/Capture
— SoftwareTimer
— High Speed Output
— Pulse Width Modulator
— WatchdogTimer
ble Serial Port withc Full-Duplex Prograrmna
— Framing ErrorDetection
— Automatic Address Recognition
● InterruptStmcturewith
— Seven
InterruptSom
— Four
priority kds
● Power-SavingModea
— Idle Mode
— Power Down Mode
Table 1 summarizs the product names and memory
differencesof the various 8XC51FX productscurrently
available.Throughout this document, the products will
generallybe referredto as the C51FX.
Table1.C51FXFamilyof Microcontroller
ROM
ROM/
‘PR?M
‘OM!es EPROM
‘AM
Device Version
VeraIon
~mes
Sytes
83C51FA 87C51FA
80C51FA 8K
256
183C51FB187C51FBI 80C51FAI 18K I 256 I
i83C51FC187C51FCI 80C51FAI 32K I 256 t
2.0 MEMORY ORGANIZATION
All MCS-51 devices have a separateaddressspace for
Programand Data Memory. Up to 64 Kbytes each of
externalProgramand Data Memory can be addressed.
2.1 Program Memory
If the= pin is connected to VX, all programfetches
are directedto external memory. On the 83C51FA (or
87C51FA), if the = pin is connected to VCc, then
program fetches to addresses OOWHthrough IFFFH
are directedto internal ROM and fetches to addresses
2000H through FFFFH are to external memory.
On the 83C51F%(or 87C51FB) if= is connected to
VCC, program fetches to addresses OOOOHthrough
3FFFH are directed to internal ROM, and fetches to
addresses40tMHthrough FFFFH areto externalmem-
ory.
On the 83C51FC (or 87C51FC) if= is connected to
Vcc, program fetches to addreasra OOOOHthrough
7FFFH aredirected to internal ROM or EPROM and
fetches to addresses 8CCIOHthrough FFFFH are to ex-
ternalmemory.
2.2 Data Memory
The C51FXimplements 256 bytea of on-chip data
RAM. The upper 128 bytes occupy a parallel address
space to the Special Function Registers. That means
they have the same addresses, but are physically sepa-
rate from SFR space
When an instructionaccessraan internallocation above
address 7FH, the CPU knows whether the
access is to
the upper 128bytes of data RAM or to SFR space by
the addressingmode used in the instruction. Instmc-
tions that use direct addressing access SFR space. For
example:
MOV OAOH,#data
5-3
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