Intel MCS 51

87C51GB Hardware Description
CONTENTS
PAGE
1.(&NTtTt::UCTION TO THE
................................................
6-3
2.0 MEMORY ORGANIZATION .................6-3
2.1 ProgramMemory............................. 6-3
2.2 Data Memory................................... 6-3
3.0 SPECIAL FUNCTION
REGISTERS
........................................... 6-5
4.0 I/o PORTS............................................6-8
4.1 1/0 Configurations............................ 6-8
4.2 Writingto a Port............................... 6-9
4.3 PortLoadingandInterfacing.......... 6-10
4.4 Read-Modify-WriteInstructions...... 6-10
4.5 AccessingExternalMemory........... 6-11
5.0 TIMEWCOUNTERS ........................... 6-13
5.1 llmer OandTimer 1....................... 6-13
ModeO............................................ 6-14
Mode 1............................................ 6-15
Mode2 ............................................ 6-16
Mode3.... ........................................ 6-16
5.2 Timer2.... ....................................... 6-17
Timer2 CaptureMode.................... 6-18
Timer2 Auto-ReloadMode............. 6-18
5.3 ProgrammableClockOut .............. 6-20
6.0 A/D CONVERTER .............................. 6-21
6.1 A/D SpecialFunctionRegisters..... 6-21
6.2 A/D ComparisonMode.................. 6-22
6.3 ND Trigger Mode......................,.... 6-22
6.4 A/D InputModes............................ 6-22
6.5 Usingthe A/D withFewerthan 8
Inputs............................................... 6-22
6.6 PJDin PowerDown........................ 6-23
CONTENTS
PAGE
7.OF+::?RAMMABLE COUNTER
..................................................
6-23
7.1 PCATimer/Counter........................ 6-24
Readingthe PCATimer.................. 6-26
7.2 Compare/CaptureModules............ 6-26
7.3 PCA CaptureMode........................ 6-27
7.4 SoftwareTimerMode..................... 6-29
7.5 HighSpeedOutputMode.............. 6-30
7.6 WatchdogTimerMode................... 6-30
7.7 PulseWidthModulatorMode......... 6-31
8.0 SERIAL PORT.................................... 6-33
8.1 FramingErrorDetection................ 6-35
8.2 MultiprocessorCommunications....8-35
8.3 AutomaticAddressRecognition..... 6-36
8.4 BaudRates.................................... 6-36
8.~:irn:r 1to GenerateBaud
................................................ 6-36
8.\:tm:r 2 to GenerateBaud
................................................
6-37
9.0 SERIAL EXPANSIONPORT.............. 6-38
9.1 ProgrammableModesandClock
Options.............................................6-39
9.2 SEP Transmissionor Reception.... 6-40
IOJIJ##DWARE WATCHDOG
...................................................
6-40
10.1 UsingtheWDT ............................ 6-40
10.2 WDT DuringPowerDownand
Idle ................................................... 640
11.0 OSCILLATOR FAIL DETECT........... 6-40
11.1OFD DuringPowerDown............. 6-41
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