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Intel MCS 51 User Manual

Intel MCS 51
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in~.
87C51GB HARDWAREDESCRIPTION
timer function (counting machine cycles) and takes
overthe useofTRl and TFl fromTimer 1.ThusTHO
nowcontrolstheTimer 1interrupt.ThelogicforMode
3 on TimerOis shownin Figure 11.
Mode3 is providedfor applicationsrequiringan extra
8-bit timer or counter. When Timer Ois in Mode 3,
Timer 1canbeturned on and offby switchingit out of
and into its ownMode 3, or can still lx used by the
serial port as a baud rate generator,or in any applica-
tion not reqtig an interrupt.
5.2 Timer 2
Timer 2 is a 16-bitTimer/Counter whichcan operate
eitheras a dineror as an eventcounter.Thisisselected
by bit C—T2in the SFR T2CON(Table7). It has the
followingthree operatingmodes:
Timer2 Capture,
Timer 2 Auto-Reload(up or downcounting),and
Timer 2 as a BaudRate Oenerstor.
The modes are also selected by bits in T2CON as
shownin Table 6.
TableI
ICLK+ ICLif
o
0
1
x
x
rimer 2
:P/m
o
1
x
o
x
Presentonlyonthe87C51FC
)peral
r2”oE
o
0
x
1
x
1
1
1
1
0
dea
Mode
16-Bit
Auto-Reload
l&Bit
Capture
Baud-Rate
Generator
Clock-out
onPI.0*
TimerOff
Table7.T2CON:Timer/Counter2ControlRegister
T200N
Address= OC6H ReaetValue= 0000OOOOB
BitAddressable
I
TF2
EXF2 RCLKI TCLKI EXEN2 TR2
Clz cP/m
Bit 7
6 5
4
3 2
1 0
8ymbol Function
TF2
EXF2
RCLK
TCLK
EXEN2
TR2
cm
cP/RD
Timer2 overflowflagsetbyaTimer2 overflowandmustbeclearedbysoftware.TF2willnot
besetwheneitherRCLK= 1orTCLK= 1.
Timer2externalflagsetwheneitheracaptureorreloadiscausedbya negativetransitionon
T2EXandEXEN2= 1.WhenTimer2interruptisenabledEXF2= 1willcausetheCPUto
vectortotheTimer2 interruptroutine.EXF2mustbeclearedbysoflware.EXF2doeanot
causeaninterruptinup/downcountermode(DOEN= 1).
Receiveclockflag.When
set,causestheserialporttouseTimer2 overflowpulsesforits
receiveclockinserialportModes1and3.RCLK= OcausesTimer1overflowtobeusedfor
thereceiveclock.
Transmitclockflag.Whenset,causestheserialporttouseTimer2overflowpulsesforits
transmitclockinserialportModes1and3.TCLK= OcausesTimer1overflowstobeused
forthetransmitclock.
Timer2 externalenableflag.Whenset allowsacaptureorreloadtooccurasa resultofa
negativetransitiononT2EXifTimer2 isnotbeingusedtoclocktheserialport.EXEN2= O
causesTimer
2toignoreeventaatT2EX.
Start/stop
oontrol for Timer 2. A logic 1 starts the timer.
Timer or counter select, (Timer 2)
O = Internal timer (OSC/12 or OSC/2 in baud rate generator mode.)
1 = External event counter (falling edge triggered).
Capture/Reload flag. When set, captures will occur on negative transition at T2EX if EXEN2
= 1. When cleared, auto-reloads will
occureitherwithTimer2 overflowsornegative
transitionsatT2EXwhenEXEN2= 1.WheneitherRCLK= 1orTCLK= 1,&isbitis
ignoredandthetimerisforcedtoauto-reloadon17mer2overflow.
6-17

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Intel MCS 51 Specifications

General IconGeneral
BrandIntel
ModelMCS 51
CategoryMicrocontrollers
LanguageEnglish

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