intd.
83C152 HARDWARE DESCRIPTION
detectedbeforethe final machinecycle of the instruc-
tion in progress,then the DMAcommencesas soonas
the instructionin progressiscompleted.Otherwise,one
more instruction will be executed before the DMA
starts. Noinstructionis executedduringany DMA Cy-
cle.
4.2 Timing Diagrams
Timing diagrams for single-byteDMA transfers are
shown in Figures 4.2 through 4.5 for four kinds of
DMA Cycles:internalmemoryto internal memory,in-
ternal memory to externalmemory,external memory
to internal memory,and external memory to external
memory.In each ease weassumethe C152is executing
out ofexternalprogrammemory.If the C152is execut-
ingout ofinternal programmemory,then IZZN isin-
active,and the Port Oand Port 2 pins emit POand P2
SFR data. If External Data Memory is involved,the
Port Oand Port 2 pinsarc usedas the
address/data bus,
and~ and/or ~ signalsare generatedas needed,in
the same
manner as in the execution of a MOVX
@’DPTRinstruction.
4.3 Hold/HoldAcknowledge
TwooperatingmodesofHold/Hold Acknowledgelog-
ic are available,and either or neither may be invoked
by software. In one mode,the C152generatea
a Hold
Request signal and awaits a Hold Acknowledgere-
sponsebefore
commencinga DMAthat involvesexter-
nal RAM. This is calledthe RequesterMode.
In the other mode,the C152accepts a Hold Request
signrdfrom an external deviceand generatesa Hold
Acknowledgesignalin response,to indicateto the re-
questing dexiee that the C152 will not commencea
DMA to
or from external W whilethe Hold Re-
queatis active.This is calledthe Arbiter mode.
.. . . . . . . . . . . . . .. . . .. . . . . . . . . . .. . . .
FLOAT ~~T~
----------------------------------
P2
PCH
x
P’ SFR
x
Pctl
~m” ew~ “fl:&y
270427-29
Figure 4.2. DMA Tranafer from Internal Memory to Internal Memory
“~
. .
POINST:
OARLn
x
W DATAOUT
x
. .
Xp” :::XI!C
I
P2 PCH
x
OARHn
x
PCH
Figure 4.3. DMA Traneferfrom Internal Memory to External Memory
7-50
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