83C152 HARDWARE DESCRIPTION
1.0 INTRODUCTION
The
83C152UniversalCommunicationsController is
an 8-bit microcontroller designedfor the intelligent
managementofperipheralsystemsor components.The
83C152is a derivativeofthe 80C51BHand retains the
same functionality.The 83C152is fabricated on the
same CHMOS 111process as the 80C51BH.What
makesthe 83C152ditTerentis that it has added func-
tions and peripheralsto the basic 80C51BHarchitec-
ture that are supportedbynewSpecialFunctionRegis-
ters (SFRS).Theseenhancementsinclude:a highspeed
multi-protocol serial communication interface, two
channelsfor DMA transfers, HOLD/HLDA bus con-
trol, a tifth 1/0 port, expanded&ta memory,and ex-
pandedprogrammemory.
In additionto a standard UART, referred to here as
Local Serial Channel (LSC), the 83C152has an on-
board multi-protocolcommunicationcontroller called
the Global Serial Channel(GSC).The GSC interface
supportsSDLC,CSMA/CD, user definableprotocols,
and a subsetof HDLC protocols.TheGSC capabilities
include:addressrecqnition, collisionresolution,CRC
generation,tlag generation,automatic retransmission,
and a hardwarebaaedacknowledgefeature. This high
s@ ~ channel is capable of implementingthe
Data LmkLayerand the PhysicalLinkLayeras shown
in the 0S1 opensystemscommunicationmodel. This
modelcan befoundin the document“ReferenceModel
for Open Systems Interconnection Architecture”,
ISO/TC97/SC16N309.
The DMA circuitry consistsof two 8-bitDMA chan-
nels with id-bit addressability.The control signala;
= ~, = (WR), hold and hold acknowledge
(HOLD/HLDA) are used to accessexternal memory.
The DMA channelsare capable of addressing up to
64K bytes(16bits). The destinationor source address
can be automaticallyincremented.The lower 8 bits of
the addressare multiplexedon the data bus Port Oand
the uppereightbitsofaddresswillbeonPort 2. Data is
transmittedoveran 8-bitaddreWdata bus. Up to 64K
bytesofdata maybe transmittedforeachDMA activa-
tion.
ThenewI/O port(P4)functionsthe sameas Ports 1-3,
foundon the 80C51BH.
Internalmemoryhasbeendoubledin the 83C152.Data
memoryhas beenexpandedto 256bytes,and internal
programmemoryhas beenexpandedto SK bytes.
There are also some specificditTerencesbetween the
83C152andthe 80C51BH.Thefmt isthat the number-
ing systembetweenthe 83C152and the 80C51BHis
slightlydifferent.The 83C152and the 80C51BHare
factory masked ROM devices. The 80C152and the
80C31BHare ROMless devices which require the
useofexternalprograntmemory.Theseconddifference
is that RESETis activelow in the 83C152and active
highin the 80C51BH.Thisis veryimportantto deaign-
erswhomaycurrentlybeusingthe 80C51BHand plrm-
ningto
use the 83C152,or are plannin
g on using both
devicesonthe sameboard. The third differenceis that
GPOand GF1, general purposeflags in PCON, have
been renamed GFIEN and XRCLK. GFIEN enables
icfletlagsto be generatedin SDLCmode,and XRCLK
enablesthe receiverto be externallyclocked.All of the
previouslyunused bits are nowbeing used and inter-
rupt vectorshave been added to support the new en-
hancements.Programmersusingoldcodegeneratedfor
the 80C51BHwill have to examin
e their programs to
ensurethat new bits are properlyloaded,and that the
newinterrupt vectorswillnot interferewith their pro-
m
Throughoutthe rest ofthis manualthe 80C152and the
83C152willbe referred to genericallyss the “C152”.
The C152is based on the 80C51BHarchitecture and
utilizesthesame80C51BHinstructionset. Figure 1.1is
a block diagram of the C152. Readers are urged to
comparethis block diagram with the 80C51BHblock
diagram.There have been no newinstructions added.
All the newfeatures and peripheralsare supported by
an extensionof the SpecialFunctionRegisters(SFRS).
Veg little of the informationpertamm
“ g specificallyto
the 80C51BHcore will be discussedin this chapter.
The detailedinformationon suchfunctionsas: the in-
struction set, port operation,timer/counters, etc., can
be foundin the MCW-51 Architecturechapter in the
Intel EmbeddedControllerHandbook.Knowledgeof
the 80C51BHis requiredto fullyunderstandthis man-
ual and the operationof the C152.To gain a basic un-
derstanding on the operation of the 80C51BH, the
readershouldfamiliarisehimselfwith the entire MCS-
51chapter of the EmbeddedControllerHandbook.
Anothersourceof informationthat the reader mayfind
helpfulis Intel’sLAN ComponentsUser’sManual, or-
der number230814.Inside are descriptionsof various
protmols, applicationexamples,and applicationnotes
dealing with ditTerentserial communicationenviron-
ments.
2.0 COMPARISON OF 80C152 AND
80C51BH FEATURES
2.1 Memory Space
A goodunderstandingofthe memoryspaceand howit
is
usedin the operation of MCS-51products is eaaen-
tial. Ml the enhancementson the C152are implement-
ed by
accessing Special Function Registers (SFRS),
addeddata memory,or addedprogrammemory.
7-3
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