Intel MCS 51

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8XC51FXHARDWAREDESCRIPTION
8.0 INTERRUPTS
All
of the bits that generate interrupts earrbe set or
cleared bv software,with the same reault as though it
The C51FX h33 a total of 7 interruptveetors: two ex-
had been-setor clea&l by hardware.That is, intefipts
temal interrupts (INTO and ~), three timer inter-
earlbe generatedor pending interrllpt3ean be cancelled
rupts (Them O, 1, and 2), the PCA interrupt, and the
in sot%vare.
serial port interrupt. Theae interruptsare all shown in
Figure 24.
Each of these interrupts will be briefly deaeribedfol-
lowed by a discussion of the interrupt enable bits and
the interruptpriority levels.
o
mm
1
ql~
I
TFo ➤
I
o
m
[El
➤
1
ql~
1
TFl
‘1
o
1
I
INTERRUPT
SOURCES
1
J
o
CCFn ECCFn
1
5,
n
RI
I
J:~
J
2706S3-21
(SeeexcretionswhenTimer2isusedsebaudrategeneratororanup/downcounter.)
Figure 24. interrupt 8ources
5-32