Intel MCS 51 User Manual

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HARDWARE DESCRIPTION OFTHE 8051,8052 AND80C51
(MSB)
(Lss)
TF2 EXF2
I
RCLK
TCLK
EXEN2
I
TR2
cm cPlm
1
symbol
POaRion
Named Signllkenw
TF2 T2CX3N.7
Timer 20vedlowflag ~bya Tiir2 ovarflowand mustbe cleeredbyaoffwara.
TF2will notbe astwtseneW@rRCLK = 1 orTCLK = 1.
EXF2 T2CON.6 limer2exfemal flag eetwheneifhar a eapfura orraload iseaumd bya negative
t~SifiOn onT2EX and EXEN2 = 1.When Tirrwr2 interruptiaenablad, EXF2 = 1
willeauaafha CPU toveeforte tha T}mer2 intarruptrwtine. EXF2 mustbe
cfeared trysoftware.
RCLK T2CON.5
Raeeivecloek ffsg.When eat, eausesthe aerfalporttouee Tirnw2 overflow
pulseaforits raceiva clookinModaa 1 and 3. RCLK = OeauaaaTimer 1 ovarlfow
to be @ ferfha raeeive Clock.
TCLK T2CON.4 Transmitclock flag.Whenaat, eaueeethe aafisl portto ueeTimw2 overflow
puleeafwitat ranemit deck inmodes 1 and 3. TCLK = OcaueeaTmer 1
overflcwsto ba uaadfor fhefranamif deck.
EXEN2
T2CON.3
Tirnar2 externalenebleffag. When set, allowsaeapfure o+raleedtoooeures a
resultofa negativatranaifiemon T2EX ifllnar2 is notbeinguaadto eiockthe
til PM. EXEN2 = OcauseaTimar2 to ignoreevenfset T2EX.
TR2 T2mN.2
Start/atop cmItrolforTimar2. A logic1 afarta Usatimer.
CII’2 T2CZ)N.1
Timarorcountaraalect flimer2)
O = Internaltimar (OSC/12)
1 = ~1 event muntar (fallingedgetrfggered).
cP/m T2c0N.o
Captwe/RaloadflW. Wheneet ~tureawillr rccuronnagstivet renaifions et
T2EX ifEXEN2 = I.When eiaarad,
aufo.ralosdswilloccuraifherwithTimer2
overflowsor nSgatiVetranaifiorreatT2EX wlwn EXEN2 = 1. WheneifherRCLK
= 1 or TCLK = 1, thisbfiisignciad and the timer isforeed foeute-rafoedem
Timar20verflew.
-. . . ———-.. —. .-
Figure 11. TZCON:Timer/Counter 2 Control Register
In the Capture Modethere are two optionswhichare
selectedby bit EXEN2 in T2CON. If EXEN2 = O,
then Timer 2 is a Id-bit timer or counter which upon
overtlowingeeta bit TF2, the Timer 2 overflowbit,
whichcan be used to generatean interrupt. If EXEN2
= 1, then Timer 2 still does the above,but with the
addedfeature that a l-to-Otransition at externalinput
T2EXcausesthe current valuein the Timer 2registers,
TL2 and TH2, to be captured into registers RCAP2L
and RCAP2H, respectively.(RCAP2L and RCAP2H
are new SpecialFunction Registers in the 8052.)In
addition, the transition at T2EX causes bit EXF2 in
T2CONto beset, and EXF2,likeTF2, an generateen
interrupt.
The Capture Modeis illustratedin Figure 12.
In the auto-reloadmcdethereare againtwooptions,
which are selected by bit EXEN2 in T2CON. If
EXEN2 = O,then whenTimer 2 rollaoverit not only
sets TF2 but also causes the Timer 2 registers to be
reloaded with the l~bit va2uein registera RCAP2L
and RCAP2H,whichare presetbysoftware.If EXEN2
= 1, then Timer 2 still does the above,but with the
added feature that a l-to-otransition at externalirmfrt
T2EX willalaotriggerthe id-bitreloadand set E&2.
The auto-reloadmedeis ilfuetratedin Figure 13.
The baud rate generatormodeis selectedby RCLK =
1and/or TCLK = 1.
Itwillbedescribedin ecmjunc-
tion with the aerialport.
SERIAL INTERFACE
The seriaf port is full duplex,meaningit can transmit
and receiveeimultarseously.It is aleoreceivebutTered,
meaning it can commencereceptionof a secondbyte
before a previouslyreceivedbyte has beersresd
from
the reeeive register. (However,if the tirat byte still
hasn’tbeenreadby thetimereceptionof the second
byte is completq one of the bytes wilf be lost). The
serial port receiveend transmit registers are both ac-
ceeaedat SpeeialFunctionRegister SBUF.Writingto
SBUF loada the transmit register, and readingSBUF
aeceeeeaa physieaflyseparatereceiveregister.
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Intel MCS 51 Specifications

General

Brand	Intel
Model	MCS 51
Category	Microcontrollers
Language	English