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Intel MCS 51 User Manual

Intel MCS 51
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i~.
87C51GB HARDWARE DESCRIPTION
The T2 Pin has another alternate function on the
addition, the transition at T2EX causes bit EXF2 in
87C51GB.It can be configuredas a Programmable
T2CONto beset. TheEXF2bit likeTF2, can generate
ClockOut. an interrupt. Figure 12illustratesthis.
TIMER2 CAPTUREMODE TIMER2 AUTO-RELOAD
In the capture modethere are two o~tionsselectedby
(UPOR DOWNCOUNTER)
bit EXEN2 in T2CON.If EXEN2 ~ O,Timer 2 is ~
Timer2can be programmedto count up or downwhen
16-bittimer on counterwhich,upon overflow,sets bit cont@red in its Id-bit auto-reloadmode.This feature
TF2 in T2CON.This bit oanthen be used to generate is invokedby a bit namedDCEN(DownCounterEn-
an interrupt. If EXEN2 = 1, Timer 2 still does the able) locatedin the SFR T2MOD(see Table 8). Upon
above,but with the added feature that a l-to-Otran-
reset the DCEN bit is set to Oso that Timer 2 will
sitionat externalinput T2EXcausesthe current value
default to count UD.WhenDCEN is set. Timer 2 can
in the Timer 2 regis~ers(TI-12and TL2) to be captured count up or down~ependingon the vrdueofthe T2EX
into registersRCAKU-Iand RCAP2L,respectively.In pin.
72 PIN
OVERFLOW
7s2
~PTURE
7RANSMON
DETECTION
I
TIMER2
INTERRUPT
EXEN2
270897-14
Figure12.Timer2inCaptureMode
Table8.T2MOD:Timer2ModeControlRegister
T2MOD Address= OC9H
ResetValue= XXXXXXOOB
NotBitAddressable
— — — —
—
— T20E
DCEN
Bit 7 6 5 4 3 2 1 0
Symbol Function
Not
implemented, reserved for future use.*
T20E
Timer2OutputEnablebit.
DECN
DownCountEnablebit.Whenset,thisallowsTimer2tobeconfiguredasanup/down
counter
*Usersoftwareshouldnotwrite1storeservedbits.Thesebitsmeybeusedinfuture8051familyproductsto invoke
newfeaturea.Inthat case,the reset or inactivevalueofthe newbitwillbe O,and
ita active value will be 1. The value
read from a reserved bit is indeterminate.
6-18

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Intel MCS 51 Specifications

General IconGeneral
BrandIntel
ModelMCS 51
CategoryMicrocontrollers
LanguageEnglish

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