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Intel MCS 51 User Manual

Intel MCS 51
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87C51GB HARDWAREDESCRIPTION
8.3 AutomaticAddressRecognition
AutomaticAddressRecognitionreducesthe CPU time
required to service the serial port. Since the CPU is
onlyinterrupted when it receivesits own ad- the
s&ware overheadto compareaddressesis eliminated.
Automaticaddreasrecognitionis enabledbysettingthe
SM2bit in SCON.With this featureenabledin oneof
the 9-bit modes, the ReceiveInterrupt (RI) flag will
onlyget set when the receivedbyte cm-respondsto ei-
ther a Givenor Broadcastaddress.
Themaster can selectivelycommunicatewith groupsof
slaves by using the Given Address. Addressing all
slavesat once is possiblewith the Broadcast Address.
Theseaddressesare definedfor each slaveby two Spe-
cial FunctionRegisters:SADDRand SADEN.
A slave’sindividual addreas is specifiedin SADDR.
SADENis a maskbytethat definesdon’t-caresto form
the Given Address.These don’t-careaallow flexibility
in the user-definedprotocol to address one or more
slavesat a time.Thefollowingisan exampleofhowthe
user could define Given Addresses to selectivelyad-
dreasdifferentslavea.
Slave 1:
SADDR= 1111 0001
SADEN= 1111 lOlO
GIVEN=
1111 oxox
Slave2:
SADDR= 1111 0011
SADEN= 1111 1001
GIVEN=
1111 Oxxl
TheSADENbyteaare selectedsuchthat eachslavecan
be addressed separately.Notice that bit 1 (LSB) is a
don’t-carefor Slave1’sGivenAddreas,but bit 1 = 1
for Slave2. Thus, to selectivelycommunicatewithjust
Slave1the master must sendan addresswith bit 1 = O
(e.g.11110000).Similarly,bit 2 = Ofor Slave1,but is
a don’t-carefor Slave2. Nowto cmnmunicatewithjust
Slave2 an address with bit 2 = 1 must be used (e.g.
11110111).Finally,for a master to eornm
unicatewith
bothslavesat oncethe addreasmusthavebit 1 = 1and
bit
2 = O.
Notice,
however, that bit 3 is a don’t-care for both
slaves.ThisallowstwoMerent addreasesto select
both slaves(11110001or 11110101).If a third slave
was added that required its bit 3 = O,then the latter
addreasmuld beusedto
communicatewithSlave1and
2 but not Slave3.
The master can also communicatewith all slaveaat
oncewiththe BroadcastAddress.It is formedfromthe
logicalOR of the SADDRand SADEN registers with
zeros definedas don’t-cares.The don’t-caresalsoallow
flexibilityin definingthe Broadcast Address, but in
most applicationsa BroadcastAddresswillbe OFFH.
The feature works the same way in the 8-bit mode
(Mode 1)as in the 9-bitmodes,exceptthat the stopbit
takesthe placeof the 9th data bit. If SM2is set, the RI
flagis set onlyifthe receivedbytematchesthe Givenor
Broadcast Addreasand is termma ted by a valid stop
bit. Settingthe SM2bit has no &Teetin ModeO.
Onreset, the SADDRandSADENregistersare initial-
ized to OOH,which defies the Given and Broadcast
Addressesas XXXX
= (~ don’t-cares).‘fhiSas-
sures the 8XC51GBserialport to be backwardscom-
patibility with other MCS-51products which do not
implementAutomaticAddressing.
8.4 BaudRates
The baud rate in ModeOis freed:
Mode OBaudRate =
OscillatorFrequency
12
The baud rate in Mode 2 dependson the value of bit
SMOD1 in Special Function Register PCON. If
SMOD1 = O(whichis the valueon reset), the baud
rate is 1/64 the oscillatorr%quency.If SMOD1 = 1,
the baud rate is 1/32 the oscillatorfrequency.
Mode2
BaudRate = 2 SMOD1 x
OscillatorFrequency
e4
The baud rates in Mode 1and Mode3 are determined
by the Timer 1 overflowrate, or by Timer 2 overtlow
rate, or by both (one for transmit and the other for
receive).
8.5 Timer1to GenerateBaudRates
When
Timer 1 is usedas the baud rate generator, the
baud ratea in Mcdes 1 and 3 are det
ermined by the
Timer 1 overtlowrate and the valueofSMOD1as fol-
lows:
#a~;&&md 3 = 2 SMOD1 X
Timer1 OverflowRate
32
Figure28 showshowcommonlyusedBaudRates may
begenerated.The Timer 1interruptshouldbe disabled
in this application.Timer 1can beconfiguredfor either
“timer” or “counter” operation,and in any of its 3
running modes.In most applications,it is configured
for “timer” operation in the auto-reloadmode (high
6-36

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Intel MCS 51 Specifications

General IconGeneral
BrandIntel
ModelMCS 51
CategoryMicrocontrollers
LanguageEnglish

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