Intel MCS 51 User Manual

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87C51GB HARDWARE DESCRIPTION
Table13.CCON:PCACounterControlR~ieter
CCON
Address= OD6H
ResetValue= OOXO00006
BitAddressable
! W ! CR I – I CCF4 ] CCF3I CCF2 I CCFI I CCFOI
Bit 7 6 5 4 3 2
1 0
Svmbol Function
CF
PCACounterOverflowflag.Setbyhardwarewhenthecounter
rolls over. CF flags an
interrupt if bit ECF in
CMODis set.CFmaybesetbyeitherhardwareorsoftwarebutcan
onlybeclearedbysoftware.
CR
PCACounterRuncontrolbit.SetbysoftwaretoturnthePCAcounteron.Mustbecleared
byeoflwaretoturnthePCAcounteroff.
Notimplemented,reservedforfutureuse*.
CCF4
PCAModule4 interruptflag.Setbyhardwerewhenamatchorcaptureoccurs.Mustbe
clearedbysoftware.
CCF3
PCAModule3 interruptflag.Setbyhardwarewhenamatchorcaptureoccurs.Mustbe
clearedbysoftware.
CCF2
PCAModule2interruptflag.Setbyhardwarewhena matchorcaptureoccurs.Mustbe
clearedbysoftware.
CCF1
PCAModule1interruptflag.Setbyherdwarewhenamatchorcaptureoccurs.Mustbe
clearedbysoftware.
CCFO
PCAModuleOinterruptflag.Setbyhardwarewhenamatchorcaptureoccurs.Mustbe
clearedbysoftware.
●NOTE:
Useraoftwsreshouldnotwriteletoreservedbite.Thesebitsmeybeusedinfuture8051familyproductstoinvoke
newfeeturee.Inthatease,theresetorinsotiveveluaofthenewbitwillbaO,enditsactivevaluewillbe 1.Thevalue
readfroma resewedbitisindeterminate.
READINGTHEPCATIMER
7.2 Compare/Capture Modules
Someapplicationsmayrequirethat the full Id-bitPCA
timer value be read simultaneously.Since the timer
consistsof two 8-bitregisters(CH, CL), it wouldnor-
mally take two MOV instructionsto read the whole
timervalue.An invalidread could
occurifthe registers
rolledoverin betweenthe executionofthe twoMOVS.
However,withthe PCA CaptureModethe M-bittimer
valuecan be loadedinto the capture registersby tog-
glinga port pin. For example,cofigure ModuleOto
cspture falling edges end initialize P1.3 to be high.
Then, when the user wants to
readthe P(2Atimer,
clearPL3andthefullI&bittimervaluewillbesaved
in the captureregisters.It’sstilloptionalwhetherthe
userwantsto generateeninterruptwiththecapture.
Eachofthe fivecompere/capture meduks has sixpos-
siblefunctionsit can perform:
16-bitCapturq positive-edgetriggered
id-bit Capture,negative-edgetriggered
id-bitCapture,bothpositiveand negative-edge
triggered
16-bitsoftwareTimer
16-bitHighSpeedOutput
8-bitPulseWidth ModuIetor.
In eddition,module4 can be usedes a WatchdogTim-
er. The modulescan be programmedin any combina-
tion of the differentmodea.
6-26

Intel MCS 51 Specifications

General

Architecture	8-bit
Number of Instructions	111
Clock Speed	12 MHz
Register Size	8-bit
Internal RAM	128 bytes
Internal ROM	4 KB
External Memory	64 KB
I/O Pins	32
Timers	2
Serial Port	1
Interrupts	5
Operating Voltage	5V
UART	Yes
Program Memory	4 KB
RAM	128 bytes
Instruction Set	CISC

Summary

MCS® 51 Family of Microcontrollers Architectural Overview

THE MCS®-51 INSTRUCTION SET

Provides an overview of the MCS®-51 instruction set, optimized for 8-bit control applications.

Interrupt Structure

Overview of the 8051 interrupt structure, sources, and vectoring.

MCS® 51 Programmer’s Guide and Instruction Set

MCS®-51 INSTRUCTION SET

Provides a summary of the 8051 instruction set, including mnemonics and operands.

8051, 8052 and 80C51 Hardware Description

TIMER/COUNTERS

Describes Timer 0 and Timer 1, including operating modes and control registers.

8XC52/54/58 Hardware Description

8XC51FX Hardware Description

PORT STRUCTURES AND OPERATION

Details port structures, I/O configurations, and external memory access.

SERIAL INTERFACE

Covers serial port modes, framing error detection, and baud rate generation.

87C51GB Hardware Description

SPECIAL FUNCTION REGISTERS

Provides a map of the SFR space and their reset values.

I/O PORTS

TIMERS/COUNTERS

PROGRAMMABLE COUNTER ARRAY

SERIAL PORT

Details the serial port's modes, framing error detection, and baud rates.

INTERRUPTS

Covers interrupt sources, enable registers, and priority levels.

RESET

83C152 HARDWARE DESCRIPTION

GLOBAL SERIAL CHANNEL

DMA OPERATION

INTERRUPT STRUCTURE