int#
87C51GBHARDWAREDESCRIPTION
brokencrystal.Tofultillthis needthe OFD triggerfre-
quencyis significantlybelowthe normaloperatingt%-
quency.The OFD willnot reset the 8XC51GBif the
oscillator frequencyshould change to another point
withinthe operatingrange.
11.1 OFDDuringPowerDown
In PowerDown,the 8XC51GBoscillatorstops in or-
der to conservepower.To preventthe 8XC51GBfrom
immediately resetting itself out of power down the
OFD mustbedisabledpriorto settingthe PD bit. Writ-
ing the sequence“OEIH, OIEH” to the Oscillator
(OSCR) SFR, turns the OFD off. Once disabl~ the
OFD can only be re-enabledby a reset or exit from
PowerDownwithan interrupt. The status of the OFD
(whether on or otl) can be determined by reading
OSCR.The LSBindicatesthe status of the OFD. The
upper 7 bits of OSCRwillalwaysbe 1swhenread. If
OSCR = OFFH,the OFD is enabled. If OSCR =
OFEH.the OFD is disabled.
12.0 INTERRUPTS
The 8XC51GBhasa total of 15interruptvectors:seven
——
external interrupts (INTO,INT1, INT2, INT3, INT4,
INT5, and INT6), three timer illterrUpt3(TimersO,1,
and 2),twoPCAinterrupts(PCAOand PCA1),the A/
D interrupt, the SEPinterrupt, and the serial port in-
terrupt. Figure 32showsthe interrupt sources.
All of the bits that generate interrupts can be set or
cleared by software,with the same result as though it
had beenset or clearedbyhardware.That is, interrupts
can be generatedor pendinginterruptscan be canceled
in software.
12.1 ExternalInterrupts
——
ExternalInterrupts INTOand INT1can eachbe either
level-activatedor negativeedge-triggered,dependingon
bits ITOand ITl in registerTCON.If ITx = O,exter-
nal interrupt x is triggered by a detected low at the
INTx pin. If ITx = 1,externalinterrupt x is negative
edge-triggered.
INT2 and INT3caneachbe either negativeor positive
edge-trigger@dependingon bits IT2and IT3 in regia-
ter
EXICON.IfITx = O,externalintermptxisnega-
tiveedge-triggered.IfITx = I, externalinterruptx is
positiveedge-triggered.
INT4, INT5, and INT6 are pmitive edge-triggered
only.
‘+
To
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0
m Kf
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--A
‘1-
,.32
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CF1
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270897-32
I
Figure32. InterruptSources
6-41
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