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Intel MCS 51 User Manual

Intel MCS 51
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i~.
87C51GB HARDWARE DESCRIPTION
Table21.EXICON:ExternalInterruptControlRegister
EXICON
Bit
EXICON
Symbol
—
IE6
IE5
IE4
IE3
IE2
IT3
IT2
ResetValue= XOOOOOOOB
Address= O(%H
NotBitAddressable
7 6 5 4 3 2
1 0
—
IE6
IE5 IE4
IE3 IE2 IT3 IT2
Function
Notimplemented,reservedforfutureuse.*
interrupt6 Edgeffag.Thisbitissetbyhardwarewhenanexternalinterruptedge
isdetected.
Interrupt5Edgeflag.Thisbitissetbyhardwarewhenanexternalinterruptedge
isdetected.
interrupt4 Edgeflag.Thisbitissetbyhardwarewhenanexternalinterruptedge
isdetected.
Interrupt3Edgeflag.Thisbitissetbyhardwarewhenanerrternalinterruptedge
isdetected.
Interrupt2Edgeflag.Thisbitissetbyhardwarewhenanexternalinterruptedge
isdetected.
Interrupt3Typecontrolbit.Thisbitissetorclearedbysoftwaretocontrol
whetherINT3ispositiveornegativetransitionactivated.WhenIT3ishigh,IE3is
setbyapositivetransitiononpinINT3.WhenIT3islow,IE3issetbyanegative
transitiononpinINT3.
Interrupt2Typecontrolbit.Thisbitissetorclearedbysoftwaretocontrol
wheth&lNT2iapositiveornegativetransitionactivated.WhenIT2ishigh,IE2is
setbyapositivetransitiononpinINT2.WhenIT2islow,IE2issetbya negative
transitiononpinINT2.
“UsingsoftwareshouldnotwriteIs toreservedbits.ThaaebitsmaybeusadinfutureS051familyProductstoinvoke
I
newf&tures. Inthatcase,theresetorinactivevalueofthenewbtiwillbeO,anditsactivevalue-willbe1,Thevalue
readfromresewedbtiisindeterminate.
The flagsthatactuallygeneratethe interrupts are bits
IEOandIE1 in TCONandIQ IE3,IE4, IE5, and IE6
in EXICON.Theseflagsareclearedby hardwarewhen
the serviceroutine is vectoredto if the interrupt was
transition-activated.If theinterruptwaslevel-activated,
thenthe externalrequestingsourceis what controlsthe
requestflag,rather than the on-chiphardware.The ex-
ternrd interrupts are enabledthrough bits EXO and
EXl in the IE registerand EX2,EX3,EX4, EX5,and
EX6in the IEA register.
Sincethe externalinterruptpinsare sampledonceeach
machinecycle an input highor lowshouldhold for at
least 12oscillator periods to ensure sampling.If the
extemsl interrupt is transition-activata the external
sourcehas to hold the requestpinhighfor at least one
cycle, and then hold it low for at least one cycle to
ensurethat the transition is seenso that interrupt re-
quest flag IEx will be set. IEx will be automatically
clearedby the CPU whenthe serviceroutine is called.
If external interrupt INTOor ~ is level-activated,
the external sourcehas to holdthe request active until
the requested interrupt is actuallygenerated. Then it
has to deactivatethe requestbeforethe interrupt serv-
ice routine is completed,or elseanother interrupt will
be generated.
642

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Intel MCS 51 Specifications

General IconGeneral
BrandIntel
ModelMCS 51
CategoryMicrocontrollers
LanguageEnglish

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