Intel MCS 51 User Manual

i~.
87C51GB HARDWARE DESCRIPTION
crystal-controlled,positivereactanceoscillator.In this
The crystal specificationsand capacitance valuea (Cl
applicationthe crystal is operatingin its fundamental
and C2in Figure 39)are notcritical. 30pF canbe used
responsemodess an inductivereactance in parallelrea-
in these positionsat any frequencywith goodquality
onancewithcapacitanceexternalto the crystal. Figure crystals. In general, crystals used with these devices
37showsthe on-chiposcillatorcircuitry.
typicallyhave the followingspecifications:
Theoscillatoronthe CHMOSdevicescarIbe turned off
ESR(EquivalentSeriesResistance)
under sotlware control by setting the PD bit in the
PCON register (Figure 38). The feedbackreaistor Rf
CO(shunt~pti~-)
7.0pF maximum
shownin the figureconsistsofparalleln-and p-channel
CL(loadcapacitance) 30pF *3 PF
PETs controll~ by the PD bit, such that Rf is opened
DriveLevel
IMW
when PD = 1. The diodes+D1 and D2, whichact as
clampsto VCCand V.S.S,are parasitic to tie Rf FETs.
XIALl
70 INrERNAL
Vcc
nwffi CKTS
A
D1
l-l
+%
270s97-37
Figure 37. On-Chip Osciiiator Circuitry
70 INlwtNAL
llmffi CK7S
f%
v=
--------
Wcal
~ALl----- XTAU------
~
QUAR7ZCRYSTAL
tb
:0:
4I
OR
CERANIC
RSSONATOR
=
270S97-38
Figure38.UsingtheCHMOSOn-ChipOacillstor
6-53

Intel MCS 51 Specifications

General

Brand	Intel
Model	MCS 51
Category	Microcontrollers
Language	English