intel.
83C152 HARDWARE DESCRIPTION
ADDRESS-The addreasfieldis usedto identifywhich
messagesare intended for which stations. The user
must assignaddressesto each destinationand source.
How the addresses are assigned,how they are main-
tained, and how each
t
ransmitter is made aware of
whichaddressesare availableis an issue that is left to
the user. Some suggestionsare discussed in Section
3.5.5.Generally,each addressisuniqueto each station
but there are special eases where this is not true. In
thesespecialcases,a messageisintendedfor morethan
one station. These multi-targetedmessagesare called
broadcast or multicast-groupaddresses. A broadcast
addressconsistingof all 1swillalwaysbe receivedby
s31stations.A multicast-groupaddressusually is indi-
catedbyusinga 1ssthe first addressbit. The user can
chooseto maskoffall or selectivebits of the addressso
that the GSC receivesall messagesor multicaat-group
messages.The addresslengthis programma
ble to be 8
or 16bita.h addressconsistingofall 1swillalwaysbe
receivedbythe GSCon the C152.Theaddressbits are
alwayspassed from the GSC to the CPU. With user
software,the address can be extendedbeyond 16bits,
but the automatic address recognitionwill only work
on a maximumof 16bita. User softwarewill have to
emsiningaddressbits.
reaolveany r
INFO - This is the informationfield and cattis the
data that one deviceon the linkwishesto transmit to
anotherdevice.It can be of any lengththe user wishes
but needsto be in multiplesof 8 bits. This is because
multiplesof 8 bits are usedto transfer data into or out
ofthe GSCFIFOS.The informationfield is delineated
from the rest of the componentsof the frame by the
precedingaddress field and the followingCRC. The
receiverdetermin
es the positionofthe end of the infor-
mationfieldby passingthe bytesthrougha temporary
storagespace. When the EOF is receivedthe bytes in
temporary storage are the CRC, and the last bit re-
ceivedpreviousto the CRC constitutethe end of the
informationfield.
CRC- The CyclicRedundancyCheck(CRC) is an er-
ror checkingalgorithm
commonlyused in serial com-
munications.The C152offerstwo types of CRC algo-
rithms, a lWit and a 32-bit.The Id-bit algorithm is
normallyusedin the SDLCmodeand willbe described
inthe SDLCsection.In CTMA/CDapplicationseither
algorithm can be used but IEEE 802.3uses a 32-bit
CRC. The generation polynomialthe C152 uses with
the 32-bitCRC is:
G(X) = X32+ X26+ x23 + x22 + x16 + x12 +
xll + x10 + x8 + x7 + X5 + x4 + X2
+x+1
The CRC generator, as shownin Figure 3.2,operates
bytakingeachbit as it is receivedand XOR’ingit with
bit 31ofthe c
urrent CRC. Thisreaultis then placedin
temporarystorage. The result of XOR’ingbit 31with
the receivedbit is then XOR’dwithbits O,1,3, 4, 6, 7,
9, 10,11,15,21,22, 25as the CRCis shith?dright one
position.Whenthe CRC is shiftedrigh~the temporary
storagespaceholdingthe resultofXOR’ing
bit 31and
the incomingbit is shifted into positionO.The whole
processis then repeatedwiththe nextincomingor out-
goingbit.
Theuser has no accessto theCRCgeneratoror the bits
which constitute the CRC whilein CSMA/CD. On
transmission,the CRC is automaticallyappended to
the data beingsent, and on reception,the CRCbitsare
not normally lcmdedinto the receiveFIFO. Instead,
theyare automaticallystripped.Theonlyindicationthe
user has for the status of the CRC is a paaa/fail tlag.
The pass/fai3 flag only operates during reception. A
CRCis consideredas passingwhenthe the CRCgener-
ator has 110001110000010011011010O1111O11Bas a
remainder after all of the daa including the CRC
checksum,from the transmittingstation has been cy-
cled through the CRC generator.The prearnbl%BOF
and EOF are not includedas part of the CRC algo-
rithm. An interrupt is availablethat will interrupt the
CPUif the CRC of the receiverisinvalid.The usercan
enablethe CRCto bepassedto the CPUby placingthe
receiverin the raw receivemcde.
Thismethcd of calculatingthe CRCis compatiblewith
IEEE 802.3.
EOF- The End Of Frame indicateswhenthe transmis-
sionis completed.The end flagitsCSMA/CD consists
ofan idlecondition.h idleconditionis assumedwhen
thereis no transitionsand the linkremainshighfor 2 or
morebit times.
7-21
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