Intel MCS 51 User Manual

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MCS@-51PROGRAMMER’SGUIDE AND INSTRUCTIONSET
CPL bit
Bytes:
Cycles:
Encoding:
Operstion:
DA A
2
1
1o11
100’01 EEiEl
CPL
(bit)~l(bit)
Funotion: Decimrd-adjustAccumulatorforAddition
Description: DA A adjuststhe eight-bitvalueinthe Accumulatorresultingfromthe earlieradditionoftwo
variables(each in packed-BCDformat),producingtwo four-bitdigits.AnyADD or ADDC
instructionmay have beenusedto perform the addition.
IfA
ccurmdatorbits 3-Oare greaterthan nine(xxxxlOIO-XXXX1I1I), or if the AC tlag is onq
ccunndatorproducingthe properJ3CDdigitin the low-ordernibble.This
sixis addedto the A
internaladditionwouldset thecarryflagifa carry-outofthe low-orderfour-bitfieldpropagat-
ed through all high-orderbits,but it wouldnot clear the carry tlag otherwise.
If the carry tlagis nowseLor ifthe four high-orderbitsnowexceednine(101OXXXX-1I1XXXX),
thesehigh-orderbitsare incrementedbysix,producingthe properBCDdigitin the high-order
nibble.Again,this wouldset the carry flagif there wasa carry-outofthe high-orderbits, but
wouldn’tclear the carry. The carry flag thus indicatesif the sum of the originaltwo BCD
variablesis greaterthan 1120,allowingmultipleprecisiondecimaladdition.OVis not affected.
All of this occurs during the oneinstructioncycle.Essentially,this instructionperforms the
decimal conversionby addingOOH,06H, 60H, or 66H to the Accurnulator, dependingon
ccurmdatorand P3Wconditions.initial A
Note:DA A cannotsimplyconverta hexadecimalnumberin the Accrumdatorto BCD nota-
tion, nor does DA A applyto decimalsubtraction.
2-39

Intel MCS 51 Specifications

General

Brand	Intel
Model	MCS 51
Category	Microcontrollers
Language	English