Intel Stratix 10 User Manual

Number of Channels Enable RS-FEC Enable Datapath and Interface Aggregate Mode Reset Controller
4 Yes Yes No Bypass
4 Yes No Yes Manual or automatic
mode
4 Yes Yes Yes Bypassed
The reset tab does not appear when you bypass the reset controller. See Reset
Controller Bypass for details about how to reset the transceiver digital logic when the
reset controller is bypassed.
Note: When resetting both the analog and digital logic, the digital reset controller cannot
reset the PMA. Therefore, you must monitor the tx_pma_ready/rx_pma_ready
outputs and make sure the PMA has been reset successfully through the AVMM
reconfiguration bus before deasserting the digital reset inputs. This ensures that the
reset controller does not accidentally deassert reset to different sub-blocks like EMIB
or RS-FEC before the PMA comes out of reset.
Related Information
Reset Controller Bypass on page 112
6.2.1. Resetting the Intel Stratix 10 E-Tile Transceiver
Use the steps below when both digital and analog resets are needed. Changing the
data rate is an example of when both digital and analog resets are needed.
1. Assert the digital reset controller. See High Level Specification for the ports and
sequence.
2.
Wait for the Native PHY's tx_ready/rx_ready outputs to deassert.
3. Assert the PMA reset on the AVMM reconfiguration bus using PMA attribute code
0x0001. The PMA's TX, RX, or both TX and RX can be placed in reset.
4.
Wait for the Native PHY IP’s tx_pma_ready, rx_pma_ready, or both outputs to
deassert.
5. Deassert the digital reset controller. See High Level Specification for the ports and
sequence.
6. Assert the appropriate PMA attribute codes on the PMA AVMM bus to reconfigure
the PMA settings.
The tx_pma_ready/rx_pma_ready assert after the PMA finishes reconfiguration,
followed by the rx_is_lockedtodata output. Finally, the tx_ready/rx_ready
outputs assert to indicate the transceiver channels have finished reset.
Related Information
High Level Specification on page 105
6. Resetting Transceiver Channels
UG-20056 | 2019.02.04
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Intel
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10 E-Tile Transceiver PHY User Guide
101

Intel Stratix 10 Specifications

General

Brand	Intel
Model	Stratix 10
Category	Control Unit
Language	English