Intel Stratix 10 User Manual

6. Resetting Transceiver Channels
Intel recommends a reset sequence that ensures the physical medium attachment
(PMA) in each transceiver channel initialize and function correctly.
6.1. When Is Reset Required?
You can reset the transmitter (TX) and receiver (RX) data paths independently or
together. To ensure that transceiver channels are ready to transmit and receive data,
you must properly reset the transceiver PHY after any of the following events.
Table 43. Digital Reset Conditions
Event Reset Requirement
Intel Stratix 10 device power-up and configuration Requires holding the TX and RX in reset while reading or writing
registers for the PMA to calibrate
Channel dynamic reconfiguration Requires holding the TX and RX in analog and digital reset before
reading or writing registers for the PMA that may cause a rate
change
Any event requiring a PMA reset such as a
reference clock changes or serial data loss
Requires a transceiver channel reset
6.2. How Do I Reset?
E-Tile transceivers have separate reset procedures for analog reset and digital reset.
You can use the PMA attribute code 0x0001 on the AVMM reconfiguration bus to
enable or disable the PMA. Digital reset can be asserted using the digital reset
controller in the Native PHY IP.
There are special reset procedures to follow if the E-Tile Native PHY IP core is
configured with the RS-FEC enabled.
Table 44. Reset Requirements when RS-FEC is Enabled
Number of Channels Enable RS-FEC Enable Datapath and Interface Aggregate Mode Reset Controller
1 to 24 No No N/A Manual or automatic
mode
1 to 3 Yes No N/A Bypassed
1 to 3 Yes Yes N/A Bypassed
4 Yes No No Bypassed
continued...
UG-20056 | 2019.02.04
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Intel Stratix 10 Specifications

General

Brand	Intel
Model	Stratix 10
Category	Control Unit
Language	English