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Intel Stratix 10 User Manual

Intel Stratix 10
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Bit Name Description SW Access
HW Access
Protection
Reset
WO
-
9.6. Register Map Revision History
Document
Version
Changes
2019.02.04 Made the following changes:
Split PMA Capability Registers into PMA Capability Registers and PMA Control and Status Registers.
Added PMA Registers 0x200 to 0x203 Usage.
Added registers 0x40143 and 0x40144.
Updated Reading PMA Analog Parameters, Updating PMA Analog Parameters, and Loading
Parameters into the Receiver.
Added Fixing Parameter Values.
Updated some parameter names.
Changed the description in the "0x002B: RX Termination and TX Driver Tri-state Behavior" section.
2018.10.08 Made the following changes:
Removed the following addresses from the "PMA AVMM Registers" section:
0xE8
0xE9
0xEA
0xEB
Added the "0x002C: Read PMA Analog Parameter" section.
Added the "0x006C: Set the PMA Analog Parameter" section.
Added the "0x00EC: Load the PMA Analog Parameter to the PMA RX" section.
Added the "RS-FEC Registers" section and all subsections.
Changed the description in the "0x000A: Receiver Tuning Controls" section.
Changed the description in the "0x0126: Read Receiver Tuning Parameters" section.
2018.07.18 Made the following changes:
Added the Name and Type columns and updated descriptions in the "PMA Capability Register Map"
table.
Added new registers to the "PMA AVMM Registers" section.
Updated the description in the "0x0008: Internal or Serial Loopback and Reverse Parallel Loopback
Control" section.
Updated the description in the "0x0018: Status/Debug Register" section.
2018.05.15 Made the following changes:
Changed the addresses in the "PMA/PCS Avalon-MM Register Map" table.
Changed the description of address 0x000A in the PMA Attribute Codes" table.
Added address 0x0011 to the "PMA Attribute Codes" table.
Changed the descriptions for addresses 0x0015 and 0x0018 in the "PMA Attribute Codes" table.
Added bit offsets [3:2] and [4] to address 0x9 in the "PMA Register Map" table.
Removed addresses 0x50040 and 0x50041 in the "PMA Capability Register Map" table.
Added address 0x8B to the "PMA Register Map" table.
2018.01.31 Initial release.
9. Register Map
UG-20056 | 2019.02.04
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Intel
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Stratix
®
10 E-Tile Transceiver PHY User Guide
211

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Intel Stratix 10 Specifications

General IconGeneral
BrandIntel
ModelStratix 10
CategoryControl Unit
LanguageEnglish

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