Intel Stratix 10 User Manual

Parameter Value Description
Number of reconfiguration
profiles
1 - 8 Specifies the number of reconfiguration profiles to support
when multiple reconfiguration profiles are enabled.
Store current configuration to
profile
On/Off Selects which reconfiguration profile to store when clicking the
Store profile button.
rcfg_profile_data0 Profile data Dynamic reconfiguration parameter data for Profile 0.
rcfg_profile_data1 Profile data Dynamic reconfiguration parameter data for Profile 1.
rcfg_profile_data2 Profile data Dynamic reconfiguration parameter data for Profile 2.
rcfg_profile_data3 Profile data Dynamic reconfiguration parameter data for Profile 3.
rcfg_profile_data4 Profile data Dynamic reconfiguration parameter data for Profile 4.
rcfg_profile_data5 Profile data Dynamic reconfiguration parameter data for Profile 5.
rcfg_profile_data6 Profile data Dynamic reconfiguration parameter data for Profile 6.
rcfg_profile_data7 Profile data Dynamic reconfiguration parameter data for Profile 7.
Related Information
• PMA Capability Registers on page 165
• PMA AVMM Registers on page 167
2.2.9. Port Information
Table 22. Port Information
Port Name Direction Width Description
pll_refclk0
Input 1 bit for each
channel
Reference clock for the transceiver.
reset
Input 1 bit for each
channel
Reset signal for the transceiver.
rx_serial_data
Input 1 bit for each
channel
Positive signal for the receiver.
rx_serial_data_n
Input 1 bit for each
channel
Negative signal for the receiver.
tx_serial_data
Output 1 bit for each
channel
Positive signal for the transmitter.
tx_serial_data_n
Output 1 bit for each
channel
Negative signal for the transmitter.
rx_parallel_data
Output 80 bits for each
channel
Parallel data of the receiver side. Refer
to Table 23 on page 51.
tx_parallel_data
Input 80 bits for each
channel
Parallel data of the transmitter side.
Refer to Table 23 on page 51.
tx_pma_ready
Output 1 bit for each
channel
Ready status signal of the transmitter
PMA.
tx_ready
Output 1 bit for each
channel
Ready status signal of the transmitter.
rx_pma_ready
Output 1 bit for each
channel
Ready status signal of the receiver PMA.
continued...
2. Implementing the Transceiver PHY Layer in Intel Stratix 10 Devices
UG-20056 | 2019.02.04
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10 E-Tile Transceiver PHY User Guide
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Intel Stratix 10 Specifications

General

Brand	Intel
Model	Stratix 10
Category	Control Unit
Language	English