Intel Stratix 10 User Manual

Figure 28. Reset Options
Table 20. Reset Parameters
Parameter Value Description
Enable manual reset On/Off When enabled, sets manual reset mode. You must control all
reset signals for the device.
Enable fast simulation for
controller
On/Off When enabled, the IP uses reduced reset time for reset
controller in simulation.
Enable fast simulation for
sequencer
On/Off When enabled, the IP disables reset staggering in simulation.
The reset behavior in simulation is different from the reset
behavior in hardware.
Enable individual TX and RX reset On/Off
When enabled, the IP uses tx_reset and rx_reset input
ports to control TX and RX individually, otherwise uses reset
input ports to control both TX and RX.
Enable individual channel reset On/Off When enabled, you can control the channels individually.
Enable TX/RX reset sequencing On/Off When enabled, the IP staggers the deassertion of the TX
reset before the RX reset. That is, tx_reset deassertion
gates rx_reset deassertion.
2.2.8. Dynamic Reconfiguration Parameters
Dynamic reconfiguration is the process of modifying transceiver channels to meet
changing requirements during device operation.
You can customize channels by triggering reconfiguration during device operation or
after power-up.
2. Implementing the Transceiver PHY Layer in Intel Stratix 10 Devices
UG-20056 | 2019.02.04
Intel
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Stratix
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10 E-Tile Transceiver PHY User Guide
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Intel Stratix 10 Specifications

General

Brand	Intel
Model	Stratix 10
Category	Control Unit
Language	English