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Intel Stratix 10 - 0 X0005: TX Channel Divide by Ratio; 0 X0006: RX Channel Divide by Ratio

Intel Stratix 10
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PMA Can Be Running While Updating PMA Attribute?
Yes
Return Value {0x89[7:0],0x88[7:0]}
0x0000: Failed due to background processes. Wait for some time and re-issue.
0x0003: Success
9.2.4. 0x0005: TX Channel Divide By Ratio
Attribute Code
0x0005
Description
Configures TX of transceiver channel to the appropriate divide-by ratio. See Supported
Data Rate Ratios for PMA Attribute Codes 0x0005 and 0x0006 for valid settings.
• 0x84[7:0] Set the data rate to reference clock frequency ratio
• 0x85[2:0]: 3'b000 to set the TX running at more than 15 Gbaud per second
• 0x85[2:0]: 3'b001 to set the TX running at half rate
• 0x85[2:0]: 3'b010 to set the TX running at quarter rate
• 0x85[2:0]: 3'b011 to set the TX running at one-eighth rate
• 0x85[3]: 1'b0
• 0x85[4]: 1'b1 to configure the PMA channel as a slave channel when multiple
channels are bonded
• 0x85[5]: 1'b0
•
0x85[6]: 1'b0 to select refclk_in_a as the TX reference clock
•
0x85[6]: 1'b1 to select refclk_in_b as the TX reference clock
• 0x85[7]: 1'b1 to apply settings to both TX and RX
PMA Can Be Running While Updating PMA Attribute?
No
Return Value {0x89[7:0],0x88[7:0]}
0x00FF: Invalid configuration
0x0005: Success
Related Information
Supported Data Rate Ratios for PMA Attribute Codes 0x0005 and 0x0006 on page 187
9.2.5. 0x0006: RX Channel Divide By Ratio
Attribute Code
0x0006
9. Register Map
UG-20056 | 2019.02.04
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10 E-Tile Transceiver PHY User Guide
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