EasyManuals Logo

Intel Stratix 10 User Manual

Intel Stratix 10
228 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Page #170 background imageLoading...
Page #170 background image
Address Bit Offset Description
0x88 [7:0] Lower byte of the PMA attribute code return value
0x89 [7:0] Upper byte of the PMA attribute code return value
0x8A [7] Core PMA register read/write in progress asserted
0x8B [0] 1'b0 indicates the PMA has finished the PMA attribute updating has finished
0x90 [0] Core PMA register read/write request
0x91 [0] Loads either the initial PMA setting or the last selected profile into the PMA. Used when
changing the PMA's reference clock as described in Switching Reference Clocks.
0xEC
[3:0]
Select reference clocks [0-8] muxed onto refclkin_in_A
[7:4]
Selects which reference clock [0-8] is mapped to refclk4 in the Native PHY IP core
0xEE
[3:0]
Selects which reference clock [0-8] is mapped to refclk0 in the Native PHY IP core
[7:4]
Selects which reference clock [0-8] is mapped to refclk1 in the Native PHY IP core
0xEF
[3:0]
Selects which reference clock [0-8] is mapped to refclk2 in the Native PHY IP core
[7:4]
Selects which reference clock [0-8] is mapped to refclk3 in the Native PHY IP core
0x200 [7:0] Set the address to 0x00 to reset the PMA when changing the PMA's reference clock.
0x201 [7:0] Set the address to 0x00 to reset the PMA when changing the PMA's reference clock.
0x202 [7:0] Set the address to 0x00 to reset the PMA when changing the PMA's reference clock.
0x203 [7:0] Set the address to 0x81 to reset the PMA when changing the PMA's reference clock.
0x204
[0] 0 indicates the PMA has been reset successfully when you change the PMA reference
clock.
0x204
[7:0] Returns the physical channel number in order to load the IP configuration to a different
channel.
0x207
[7] 1 indicates the PMA has been reset when you change the PMA's reference clock. The bit
automatically clears after read. You must also read 0x204[0] to ensure the reset is
successful.
Related Information
Switching Reference Clocks on page 129
9.2. PMA Attribute Codes
Use the following attribute codes to set registers 0x87[7:0] down to 0x84[7:0] in the
PMA register map to send or receive attribute values to or from the PMA.
9.2.1. 0x0001: PMA Enable/Disable
Attribute Code
0x0001
9. Register Map
UG-20056 | 2019.02.04
Intel
®
Stratix
®
10 E-Tile Transceiver PHY User Guide
Send Feedback
170

Table of Contents

Other manuals for Intel Stratix 10

Questions and Answers:

Question and Answer IconNeed help?

Do you have a question about the Intel Stratix 10 and is the answer not in the manual?

Intel Stratix 10 Specifications

General IconGeneral
BrandIntel
ModelStratix 10
CategoryControl Unit
LanguageEnglish

Related product manuals