Intel Stratix 10 - E-Tile Layout in Stratix 10 Device Variants; Intel Stratix 10 TX H-Tile and E-Tile Configurations

Feature Description
• 24 channels available in NRZ mode for data rates from 1 Gbps
to 30 Gbps
• 24 channels available in PAM4 mode for data rates from 2
Gbps to 30 Gbps
• 12 channels available in PAM4 mode for data rates from 30
Gbps to 57.8 Gbps
10G/25G/100G Ethernet with optional 1588 capability
+ RS-FEC (528, 514)/RS-FEC (544, 514)
Hard IP
1.2. E-Tile Layout in Stratix 10 Device Variants
Intel Stratix 10 TX or MX FPGA configurations support E-Tile transceivers.
Intel Stratix 10 MX device configurations combine FPGAs with high-bandwidth
memory.
1.2.1. Intel Stratix 10 TX H-Tile and E-Tile Configurations
Intel Stratix 10 TX FPGAs offer transceiver capability by combining H-Tiles and E-Tiles.
This section lists all possible TX FPGA configurations.
Figure 1. Intel Stratix 10 TX Device with 1 E-Tile and 1 H-Tile (48 Transceiver
Channels)
H-Tile
(24 Channels)
Package Substrate
EMIB
Core Fabric
®
TX 400 NF43 (F1760)
E-Tile
(24 Channels)
EMIB
TX 650 NF43 (F1760)
TX 850 NF43 (F1760)
TX 1100 NF43 (F1760)
1. Intel
®
Stratix
®
10 E-Tile Transceiver PHY Overview
UG-20056 | 2019.02.04
Intel
®
Stratix
®
10 E-Tile Transceiver PHY User Guide
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