Intel Stratix 10 User Manual

Feature L-Tile/H-Tile E-Tile
Reconfiguration and
register map
Registers available to configure the following:
• PMA
• PCS
• ATXPLL
• fPLL
Separate register map for the following:
• PMA
• RS-FEC
• EHIP_LANE + EHIP_CORE
• 1588 PTP
PCS Available within the Native PHY IP core Available within Ethernet Hard IP, not in the
Native PHY IP core
Transmitter PMA One post-tap and one pre-tap emphasis One post-tap and three pre-tap emphasis for
PAM4
One post-tap and one pre-tap emphasis for
NRZ
Receiver PMA Four RX adaptation modes:
• Manual VGA, Manual CTLE, DFE Off
• Adaptive VGA, Adaptive CTLE, DFE Off
• Adaptive VGA, Adaptive CTLE, 1-Tap
Adaptive DFE
• Adaptive VGA, Adaptive CTLE, All-Tap
Adaptive DFE
Two RX adaptation modes:
• Continuous Adaptation
• Initial Adaptation
Loopback paths Serial, Pre-CDR Reverse Serial, Post-CDR
Reverse Serial
Internal or serial loopback (serial TX to serial
RX)
Reverse parallel loopback (parallel RX to
parallel TX)
Hard PRBS Available Available
Hard PRBS error
injection
Not available Available
Eye viewer On-Die Instrumentation through Transceiver
Toolkit and Avalon-MM (AVMM) access
Eye viewer available only through
Transceiver Toolkit
1.5. Intel Stratix 10 E-Tile Transceiver PHY Overview Revision
History
Document
Version
Changes
2019.02.04 Made the following changes:
• Updated figures in "Intel Stratix 10 TX H-Tile and E-Tile Configurations".
• Updated "Transceiver Counts in Intel Stratix 10 TX Devices with E-Tiles (NF43, SF50, UF50, YF55)."
• Updated "Transceiver Counts in Intel Stratix 10 MX Devices with E-Tiles (UF55)."
2018.10.08 Made the following changes:
• Changed the description of Inputs in the "Key Reference Clock Considerations" table.
• Removed the "TX and RX with Different Reference Clocks" figure.
• Clarified the descriptions for the transmitter PMA and loopback paths in the "Transceiver Tile
Feature Comparison" table.
2018.07.18 Made the following changes:
• Changed the PAM4 data rate to 57.8 Gbps in the "Transceiver Tile Variants" table.
2018.05.15 Made the following changes:
continued...
1. Intel
®
Stratix
®
10 E-Tile Transceiver PHY Overview
UG-20056 | 2019.02.04
Intel
®
Stratix
®
10 E-Tile Transceiver PHY User Guide
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Intel Stratix 10 Specifications

General

Brand	Intel
Model	Stratix 10
Category	Control Unit
Language	English