Omron SYSMAC CV Series

Appendix AInstruction Set
520
Programming Instructions
The following tables detail all of the ladder diagram programming instructions for the CV-series PCs and the
applicable data areas for each. Bit and word addresses for each area are given in the footnotes.
Up and down differentiated instructions are indicated with an up or down arrow (j or i) prefix. Immediate re-
fresh instructions are indicated with a “!” prefix.
The DM and EM areas can be indirectly addressed by specifying the data area as *DM or *EM, and then en-
tering the address of the DM or EM word that contains the actual data. Index and data registers can also be
used for indirect addressing.
BASIC Instructions
Name, mnemonic, variations,
and symbol
Function Operand data
areas
Page
LOAD
LD, !LD, jLD, iLD,
!jLD, !iLD
B
Defines the status of bit B as the execution
condition for subsequent operations on the
instruction line.
B:
CIO
G
A
T/C
ST
TN
121
LOAD NOT
LD NOT, !LD NOT
B
Defines the inverse of the status of bit B as the
execution condition for subsequent operations
on the instruction line.
B:
CIO
G
A
T/C
ST
TN
121
AND
AND, !AND, jAND,
iAND, !jAND, !iAND
B
Logically ANDs the status of the designated bit
with the current execution condition.
B:
CIO
G
A
T/C
ST
TN
121
AND NOT
AND NOT, !AND NOT
B
Logically ANDs the inverse of the status of the
designated bit with the current execution
condition.
B:
CIO
G
A
T/C
ST
TN
121