8. The test runs vce-ic-1x, which generates a collector family of curves (I
C
vs. V
C
) for the
transistor.
9. The action prober-ss-move moves the prober to the next subsite.
10. The tests continue with subsite2 and subsite3.
11. After all the subsites have run, the action prober-separate separates the prober pins from the
wafer.
12. The action prober-prompt displays the message “Wafer Test Complete” at the end of the test.