42 www.xilinx.com 7 Series FPGAs SelectIO Resources User Guide
UG471 (v1.10) May 8, 2018
Chapter 1: SelectIO Resources
The IOBUFDS_DCIEN primitive can disable the input buffer and force the O output to the
fabric to a logic High when the USE_IBUFDISABLE attribute is set to TRUE and the
IBUFDISABLE signal is asserted High. If USE_IBUFDISABLE is set to FALSE, this input is
ignored and should be tied to ground. If the I/O is using the split-termination DCI feature,
this primitive disables the termination legs whenever the DCITERMDISABLE signal is
asserted High. Only the 3-state DCI I/O standards can be used on bidirectional signals.
With 3-state DCI I/O standards, the DCI termination legs turn off whenever the driver is
active. The IOBUFDS_DCIEN primitive further allows the termination legs to be disabled
whenever the DCITERMDISABLE signal is asserted High. These features can be combined
to reduce power whenever the input is idle for a period of time.
IOBUFDS_DIFF_OUT
Figure 1-29 shows the differential input/output buffer primitive with complementary
outputs (O and OB). This primitive is only recommended for use by experienced Xilinx
designers with memory interface applications. A logic High on the T pin disables the
output buffer.
X-Ref Target - Figure 1-2 8
Figure 1-28: Differential Bidirectional Buffer With Input Path Disable and DCI
Disable (IOBUFDS_DCIEN)
IOBUFDS_DCIEN
IBUFDISABLE
DCITERMDISABLE
T
I
O
IO
IOB
UG471_c1_69_021214
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