Xilinx SelectIO 7 Series - LvdciDv2

7 Series FPGAs SelectIO Resources User Guide www.xilinx.com 57
UG471 (v1.10) May 8, 2018
Supported I/O Standards and Terminations
LVDCI_DV2
A controlled impedance driver with half impedance (source termination) can also provide
drivers with one half of the impedance of the reference resistors. This allows reference
resistors to be twice as large, thus reducing static power consumption through VRN/VRP.
The I/O standards supporting a controlled impedance driver with half impedance are:
LVDCI_DV2_15 and LVDCI_DV2_18. Figure 1-43 and Figure 1-44 illustrate a controlled
driver with half impedance unidirectional topologies.
To match the drive impedance to Z
0
when using a driver with half impedance, the
reference resistor R must be twice Z
0
.
X-Ref Target - Figure 1-4 1
Figure 1-41: Unidirectional Controlled Impedance Driver Topology
X-Ref Target - Figure 1-4 2
Figure 1-42: Bidirectional Controlled Impedance Driver Topology
Z
0
IOB
IOB
LVDCI
LVDCI
ug471_c1_31_011811
R
0
= R
VRN
= R
VRP
= Z
0
Z
0
IOB
IOB
LVDCI
LVDCI
ug471_c1_32_011811
R
0
= R
VRN
= R
VRP
= Z
0
R
0
= R
VRN
= R
VRP
= Z
0
Table 1-17: Available I/O Bank Type
HR HP
N/A Available
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