Xilinx SelectIO 7 Series - HSULDCI12 and DIFFHSUL12 DCI; Hsul12

7 Series FPGAs SelectIO Resources User Guide www.xilinx.com 85
UG471 (v1.10) May 8, 2018
Supported I/O Standards and Terminations
HSUL_DCI_12 and DIFF_HSUL_12_DCI
DCI provides a tuned output impedance driver that matches the output impedance to the
reference resistors on the VRP and VRN pins. No split termination resistors are present for
either drivers or receivers. The differential (DIFF_) versions use complementary
single-ended drivers for outputs and differential receivers for inputs.
HSUL_12
Figure 1-64 shows a sample circuit illustrating a unidirectional board topology (with no
termination) for HSUL_12. Only HP I/O banks support the DCI version.
Table 1-38: Available I/O Bank Type
HR HP
N/A Available
X-Ref Target - Figure 1-64
Figure 1-64: HSUL_12 with Unidirectional Signalling
Z
0
IOB
IOB
HSUL_12
HSUL_12
ug471_c1_54_011811
Z
0
IOB
IOB
HSUL_12_DCI
HSUL_12_DCI
V
REF
= 0.60V
+
–
V
REF
= 0.60V
+
–
Example Board Topology
DCI
R
0
= 50Ω
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