Xilinx SelectIO 7 Series - LVCMOS (Low Voltage CMOS)

54 www.xilinx.com 7 Series FPGAs SelectIO Resources User Guide
UG471 (v1.10) May 8, 2018
Chapter 1: SelectIO Resources
LVCMOS (Low Voltage CMOS)
LVCMOS is a widely used switching standard implemented in CMOS transistors. This
standard is defined by JEDEC (JESD 8C.01). The LVCMOS standards supported in 7 series
FPGAs are: LVCMOS12, LVCMOS15, LVCMOS18, LVCMOS25, and LVCMOS33.
Sample circuits illustrating both unidirectional and bidirectional LVCMOS termination
techniques are shown in Figure 1-39 and Figure 1-40. These two diagrams show examples
of source-series and parallel terminated topologies.
Figure 1-39 shows unidirectional terminated topologies.
Table 1-11: Available I/O Bank Type
HR HP
Available Available
X-Ref Target - Figure 1-3 9
Figure 1-39: LVCMOS Unidirectional Termination
Z
0
IOB
IOB
LVCMOS
LVCMOS
Z
0
IOB
IOB
LVCMOS
LVCMOS
Z
0
IOB
IOB
LVCMOS
LVCMOS
ug471_c1_29_011811
V
TT
Note: V
TT
is any voltage from 0V to V
CCO
R
P
= Z
0
R
S
= Z
0
– R
D
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