Xilinx SelectIO 7 Series - Differential HSTL Class I

64 www.xilinx.com 7 Series FPGAs SelectIO Resources User Guide
UG471 (v1.10) May 8, 2018
Chapter 1: SelectIO Resources
Differential HSTL Class I
Figure 1-47 shows a sample circuit illustrating a termination technique for differential
HSTL class-I (1.5V or 1.8V) with unidirectional termination. In a specific circuit, all drivers
and receivers must be at the same voltage level (either 1.5V or 1.8V); they are not
interchangeable.
X-Ref Target - Figure 1-4 7
Figure 1-47: Differential HSTL Class I (1.5V or 1.8V) Unidirectional Termination
ug471_c1_37_011811
+
–
External Termination
Z
0
IOB
IOB
DIFF_HSTL_I
DIFF_HSTL_I_18
DIFF_HSTL_I
DIFF_HSTL_I_18
DIFF_HSTL_I
DIFF_HSTL_I_18
Z
0
V
TT
= 0.75V for HSTL_I
0.9V for HSTL_I_18
V
TT
= 0.75V for HSTL_I
0.9V for HSTL_I_18
50Ω
50Ω
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