7 Series FPGAs SelectIO Resources User Guide www.xilinx.com 47
UG471 (v1.10) May 8, 2018
7 Series FPGA SelectIO Attributes/Constraints
The DCI_CASCADE attribute uses this syntax in the UCF file:
CONFIG DCI_CASCADE = "<master> <slave1> <slave2> ...";
For example:
CONFIG DCI_CASCADE = "11 13 15 17";
Location Constraints
The location constraint (LOC) must be used to specify the I/O location of an instantiated
I/O primitive. The possible values for the location constraint are all the external port
identifiers (e.g., A8, M5, AM6, etc.). These values are device and package size dependent.
The LOC attribute uses the following syntax in the UCF file:
INST <I/O_BUFFER_INSTANTIATION_NAME> LOC =
"<EXTERNAL_PORT_IDENTIFIER>";
Example:
INST MY_IO LOC=R7;
IOSTANDARD Attribute
The IOSTANDARD attribute is available to choose the values for an I/O standard for all
I/O buffers. The supported I/O standards are listed in the specific 7 series FPGAs data
sheets, however, Table 1-56 lists the IOSTANDARD support by bank type (HR, HP, or
both). The IOSTANDARD attribute uses the following syntax in the UCF file:
INST <I/O_BUFFER_INSTANTIATION_NAME> IOSTANDARD=”<IOSTANDARD VALUE>”;
The IOSTANDARD default for single-ended I/O is LVCMOS18, for differential I/Os the
default is DIFF_HSTL_II_18.
IBUF_LOW_PWR Attribute
The IBUF_LOW_PWR attribute is available for the following inputs:
• All I/O standards with differential inputs, including:
•LVDS
•LVDS_25
• PPDS_25
•RSDS_25
• MINI_LVDS_25
• BLVDS_25
• DIFF_HSTL (all variations)
• DIFF_SSTL (all variations)
• DIFF_MOBILE_DDR
• DIFF_HSUL (all variations)
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