Abov MC97F60128 User Manual

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MC97F60128
ABOV Semiconductor Co., Ltd.
SPI2SRL (SPI 2 Status Low Register) : 4086H (XSFR)
7
6
5
4
3
2
1
0
TXFEIFR
RXFFIFR
SPI2IFR
–
TXFFF
RXFEF
–
–
R/W
R/W
R/W
–
R/W
R/W
–
–
Initial value : 04H
TXFEIFR
When SPI2 Tx FIFO empty Interrupt occurs, this bit becomes ‘1’. For clearing bit, write
‘0’ to this bit or auto clear by INT_ACK signal. Write ‘1’ has no effect.
0
SPI2 Tx FIFO empty Interrupt no generation
1
SPI2 Tx FIFO empty Interrupt generation
RXFFIFR
When SPI2 Rx FIFO full Interrupt occurs, this bit becomes ‘1’. For clearing bit, write ‘0’
to this bit or auto clear by INT_ACK signal. Write ‘1’ has no effect.
0
SPI2 Rx FIFO full Interrupt no generation
1
SPI2 Rx FIFO full Interrupt generation
SPI2IFR
When SPI2 Interrupt occurs, this bit becomes ‘1’. If SPI2 interrupt is enable, this bit is
auto clear by INT_ACK signal. If SPI2 interrupt is disable, SPI2IFR bit is cleared when
the SPI2SRH is read and then access (read/write) the SPI2DR. Write ‘1’ has no effect.
0
SPI2 Interrupt no generation
1
SPI2 Interrupt generation
TXFFF
SPI2 Tx FIFO Full Flag
0
No SPI2 Tx FIFO full
1
SPI2 Tx FIFO full
RXFEF
SPI2 Rx FIFO Empty Flag
0
No SPI2 Rx FIFO empty
1
SPI2 Rx FIFO empty

Abov MC97F60128 Specifications

General

Brand	Abov
Model	MC97F60128
Category	Microcontrollers
Language	English