Abov MC97F60128 - Page 246

246
MC97F60128
ABOV Semiconductor Co., Ltd.
UARTnDR (UARTn Data Register) : 4065H/406DH/4075H (XSFR), Where n = 2, 3 and 4
7
6
5
4
3
2
1
0
UARTnDR7
UARTnDR6
UARTnDR5
UARTnDR4
UARTnDR3
UARTnDR2
UARTnDR1
UARTnDR0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial value : 00H
UARTnDR [7:0]
The UARTn Transmit Buffer and Receive Buffer share the same I/O address with this
DATA register. The Transmit Data Buffer is the destination for data written to the
UARTnDR register. Reading the UARTnDR register returns the contents of the Receive
Buffer.
Write this register only when the UDREn flag is set.
UARTnCR1 (UARTn Control Register 1) : 4060H/4068H/4070H (XSFR),, Where n = 2, 3 and 4
7
6
5
4
3
2
1
0
-
-
UnPM1
UnPM0
UnSIZE2
UnSIZE1
UnSIZE0
-
-
-
R/W
R/W
R/W
R/W
R/W
-
Initial value : 00H
UnPM[1:0]
Selects Parity Generation and Check methods
UnPM1
UnPM0
Parity
0
0
No Parity
0
1
Reserved
1
0
Even Parity
1
1
Odd Parity
UnSIZE[2:0]
Selects the Length of Data Bits in Frame
UnSIZE2
UnSIZE1
UnSIZE0
Data Length
0
0
0
5 bit
0
0
1
6 bit
0
1
0
7 bit
0
1
1
8 bit
1
1
1
9 bit
Other values
Reserved