Abov MC97F60128 - Page 312

312
MC97F60128
ABOV Semiconductor Co., Ltd.
Figure 11.96 Resistor Bias Connection for External VLCD
VSS
RR R
VLC0 VLC1 VLC 2 VLC3
VLCD
(Internal Resistor Bias)
VLC0 VLC1 VLC2 VLC3
R`
R RR
VLCD
(External Resistor Bias )
VLC0 VLC1 VLC2 VLC3
VSS
R`
LCTEN
DISP
Co
n
tras
t
C
ont
r
ol
l
er
Off Off
LCTEN
DISP
C
ont
rast
Cont
ro
ll
e
r
Off Off
VSS
RR R
VLC0 VLC1 VLC 2 VLC3
VLCD
(Internal Resistor Bias)
VLC0 VLC1 VLC2 VLC3
R`
R RR
VLCD
(External Resistor Bias )
VLC0 VLC1 VLC2 VLC3
VSS
R`
LCTEN
DISP
Co
n
tras
t
C
ont
r
ol
l
er
Off Off
LCTEN
DISP
C
ont
rast
Cont
ro
ll
e
r
Off Off