Chapter 10 10-47
Service Key Menus and Error Messages
Error Messages
OVERLOAD ON INPUT R, POWER REDUCED
Error Number 57 You have exceeded approximately +14 dBm at one of the test ports. The RF output
power is automatically reduced to −85 dBm. The annotation P⇓ appears in the left
margin of the display to indicate that the power trip function has been activated.
When this occurs, reset the power to a lower level, then toggle the
softkey to switch on the power again.
OVERLOAD ON REFL PORT, POWER REDUCED
(ET only)
Error Number 58 See OVERLOAD ON INPUT R POWER REDUCED (error number 57).
OVERLOAD ON TRANS PORT, POWER REDUCED
(ET only)
Error Number 59
See OVERLOAD ON INPUT R POWER REDUCED (error number 57).
PARALLEL PORT NOT AVAILABLE FOR GPIO
Error Number 165 You have defined the parallel port as COPY for sequencing in the GPIB menu. To
access the parallel port for general purpose I/O (GPIO), set the selection to [GPIO].
PARALLEL PORT NOT AVAILABLE FOR COPY
Error Number 167 You have defined the parallel port as general purpose I/O (GPIO) for sequencing. The
definition was made under the key menus. To access the parallel port for
copy, set the selection to .
PHASE LOCK CAL FAILED
Error Number 4 An internal phase lock calibration routine is automatically executed at power-on,
preset, and any time a loss of phase lock is detected. This message indicates that
phase lock calibration was initiated and the first IF detected, but a problem prevented
the calibration from completing successfully. Refer to
Chapter 3 , “Adjustments and
Correction Constants,”
and execute pretune correction (test 48). This message may
appear if you connect a mixer between the RF output and R input before turning on
frequency offset mode. Ignore it: it will go away when you turn on frequency offset.
This message may also appear if you turn on frequency offset mode before you define
the offset.
PHASE LOCK LOST
Error Number 8
Phase lock was acquired but then lost. Refer to
Chapter 7 , “Source
Troubleshooting.”
POSSIBLE FALSE LOCK
Error Number 6 Phase lock has been achieved, but the source may be phase-locked to the wrong
harmonic of the synthesizer. Perform
“Source Pretune Correction Constants (Test
48)” on page 3-10
.
Local
To Next Page
Loading...
Need help?
General
