Intel MCS 51 User Manual

i~.
8XC51FXHARDWAREDESCRIPTION
control bits in SFR TCON (Table 6). The GATE bit is
MODE 2
in TMOD. There aretwo differentGATE bits, one for
Timer 1 (TMOD.7) and one for Timer O(TMOD.3).
Mcde 2 mnfigures the Timer registeras an 8-bit Coun-
ter(TLx) with automaticreload,asshown in Figure 10.
The 13-bitregistermnsists of all 8 bits of THx and the Overtlowfrom TLx not only sets TFx, but also reloads
lower 5 bits of TLx. The unmx 3 bits of TLx are inde-
TLx with the ecmtentsof THx. which is oreaetbv soft-
terminateand should be i~ored. Setting the run flag
ware.The reload leaves THx tichanged~ -
(TRx) does not clear these registers.
MODE 1
Mode 1 is the same as Mode O,except that the Timer
registeruses all 16bita. Referto Figure9. In this mode,
THx and TLx are cascaded;there is no presc.aler.
Table 5. TMOD: Timer/Counter Mode Control Regiater
TMOD
Address= 89H
ResetValue = 0000 OOOOB
Not BitAddressable
TIMER 1 TIMER O
GATE
C/~ I Ml MO GATE c/T
Ml I MO
Bit 7 6 5
4
3
2
1 0
Symbol
Function
GATE
cm
Ml MO
00
01
10
11
1
1
Gatingcontrolwhenset.Timer/CounterOor1isenabledonlywhile~ or~ pin
ishighandTROorTR1controlpinisset.Whencleared,TimerOor 1isenabled
wheneverTROorTR1controlbitisset.
TimerorCounterSelector.ClearforTimeroperation(inputfrominternalsystem
clock).SetforCounteroperation(inputfromTOorTl inputpin).
Operating Mode
8-bitTimer/Counter.THx withTLx as 5-bitpresceler.
16-bitTimer/Counter.THx andTLx are cascaded;there isnoprescaler.
8-bitauto-reloadTimer/Counter.THx holdsa valuewhichisto be reloadedintoTLx
each timeitoverflows.
(TimerO)TLOisan 8-bitTimer/Countercontrolledbythe standardTimerOcontrol
bits.
THOisan8-bittimeronlycontrolledbyTimer1controlbits.
Timer 1)~mer/Counterstopped.
,“.-__J
CONTROL
OVERFLOW
I
x = Oor1
270653-6
Figure 8. Timer/Counter Oor 1 in Mode O:13-Bit Counter
5-13

Intel MCS 51 Specifications

General

Brand	Intel
Model	MCS 51
Category	Microcontrollers
Language	English